commit 6d0f6bcf337c5261c08fabe12982178c2c489d76
author Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Thu Oct 16 15:01:15 2008 +0200
committer Wolfgang Denk <wd@denx.de> Sat Oct 18 21:54:03 2008 +0200
tree ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f
parent 71edc271816ec82cf0550dd6980be2da3cc2ad9e

rename CFG_ macros to CONFIG_SYS

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

cpu/mpc85xx/cpu.c

diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index f15b0a8..61162a8 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -84,7 +84,7 @@
 	uint major, minor;
 	struct cpu_type *cpu;
 #ifdef CONFIG_DDR_CLK_FREQ
-	volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
+	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 	u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO)
 		>> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
 #else
@@ -151,11 +151,11 @@
 		break;
 	}
 
-#if defined(CFG_LBC_LCRR)
-	lcrr = CFG_LBC_LCRR;
+#if defined(CONFIG_SYS_LBC_LCRR)
+	lcrr = CONFIG_SYS_LBC_LCRR;
 #else
 	{
-	    volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
+	    volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
 
 	    lcrr = lbc->lcrr;
 	}
@@ -200,7 +200,7 @@
 	if (ver & 1){
 	/* e500 v2 core has reset control register */
 		volatile unsigned int * rstcr;
-		rstcr = (volatile unsigned int *)(CFG_IMMR + 0xE00B0);
+		rstcr = (volatile unsigned int *)(CONFIG_SYS_IMMR + 0xE00B0);
 		*rstcr = 0x2;		/* HRESET_REQ */
 		udelay(100);
 	}
@@ -256,7 +256,7 @@
 
 #if defined(CONFIG_DDR_ECC)
 void dma_init(void) {
-	volatile ccsr_dma_t *dma = (void *)(CFG_MPC85xx_DMA_ADDR);
+	volatile ccsr_dma_t *dma = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR);
 
 	dma->satr0 = 0x02c40000;
 	dma->datr0 = 0x02c40000;
@@ -266,7 +266,7 @@
 }
 
 uint dma_check(void) {
-	volatile ccsr_dma_t *dma = (void *)(CFG_MPC85xx_DMA_ADDR);
+	volatile ccsr_dma_t *dma = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR);
 	volatile uint status = dma->sr0;
 
 	/* While the channel is busy, spin */
@@ -285,7 +285,7 @@
 }
 
 int dma_xfer(void *dest, uint count, void *src) {
-	volatile ccsr_dma_t *dma = (void *)(CFG_MPC85xx_DMA_ADDR);
+	volatile ccsr_dma_t *dma = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR);
 
 	dma->dar0 = (uint) dest;
 	dma->sar0 = (uint) src;
@@ -306,7 +306,7 @@
 {
 	int i, mdr, mad, old_mad = 0;
 	volatile u32 *mxmr;
-	volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
+	volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
 	volatile u32 *brp,*orp;
 	volatile u8* dummy = NULL;
 	int upmmask;