rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
diff --git a/include/configs/M5271EVB.h b/include/configs/M5271EVB.h
index 844b74f..7ddeb55 100644
--- a/include/configs/M5271EVB.h
+++ b/include/configs/M5271EVB.h
@@ -41,9 +41,9 @@
#define CONFIG_MCFTMR
#define CONFIG_MCFUART
-#define CFG_UART_PORT (0)
+#define CONFIG_SYS_UART_PORT (0)
#define CONFIG_BAUDRATE 115200
-#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
#undef CONFIG_WATCHDOG /* disable watchdog */
@@ -57,7 +57,7 @@
#endif
#define CONFIG_ENV_SECT_SIZE 0x2000
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+#define CONFIG_SYS_USE_PPCENV /* Environment embedded in sect .ppcenv */
/*
* BOOTP options
@@ -89,32 +89,32 @@
# define CONFIG_NET_MULTI 1
# define CONFIG_MII 1
# define CONFIG_MII_INIT 1
-# define CFG_DISCOVER_PHY
-# define CFG_RX_ETH_BUFFER 8
-# define CFG_FAULT_ECHO_LINK_DOWN
+# define CONFIG_SYS_DISCOVER_PHY
+# define CONFIG_SYS_RX_ETH_BUFFER 8
+# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-# define CFG_FEC0_PINMUX 0
-# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
+# define CONFIG_SYS_FEC0_PINMUX 0
+# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
# define MCFFEC_TOUT_LOOP 50000
-/* If CFG_DISCOVER_PHY is not defined - hardcoded */
-# ifndef CFG_DISCOVER_PHY
+/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
+# ifndef CONFIG_SYS_DISCOVER_PHY
# define FECDUPLEX FULL
# define FECSPEED _100BASET
# else
-# ifndef CFG_FAULT_ECHO_LINK_DOWN
-# define CFG_FAULT_ECHO_LINK_DOWN
+# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# endif
-# endif /* CFG_DISCOVER_PHY */
+# endif /* CONFIG_SYS_DISCOVER_PHY */
#endif
/* I2C */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C /* I2C with hw support */
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
-#define CFG_I2C_SPEED 80000
-#define CFG_I2C_SLAVE 0x7F
-#define CFG_I2C_OFFSET 0x00000300
-#define CFG_IMMR CFG_MBAR
+#define CONFIG_SYS_I2C_SPEED 80000
+#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C_OFFSET 0x00000300
+#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
#define CONFIG_BOOTFILE "u-boot.bin"
@@ -141,25 +141,25 @@
"save\0" \
""
-#define CFG_PROMPT "=> "
-#define CFG_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_PROMPT "=> "
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
-#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#endif
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS 16 /* max number of command args */
-#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CFG_LOAD_ADDR 0x00100000
+#define CONFIG_SYS_LOAD_ADDR 0x00100000
-#define CFG_MEMTEST_START 0x400
-#define CFG_MEMTEST_END 0x380000
+#define CONFIG_SYS_MEMTEST_START 0x400
+#define CONFIG_SYS_MEMTEST_END 0x380000
-#define CFG_HZ 1000000
-#define CFG_CLK 100000000
+#define CONFIG_SYS_HZ 1000000
+#define CONFIG_SYS_CLK 100000000
/*
* Low Level Configuration Settings
@@ -167,56 +167,56 @@
* You should know what you are doing if you make changes here.
*/
-#define CFG_MBAR 0x40000000 /* Register Base Addrs */
+#define CONFIG_SYS_MBAR 0x40000000 /* Register Base Addrs */
/*
* Definitions for initial stack pointer and data area (in DPRAM)
*/
-#define CFG_INIT_RAM_ADDR 0x20000000
-#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
-#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
-#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
-#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
+#define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
+#define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*
* Start addresses for the final memory configuration
* (Set up by the startup code)
- * Please note that CFG_SDRAM_BASE _must_ start at 0
+ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
*/
-#define CFG_SDRAM_BASE 0x00000000
-#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
-#define CFG_FLASH_BASE 0xffe00000
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
+#define CONFIG_SYS_FLASH_BASE 0xffe00000
#ifdef CONFIG_MONITOR_IS_IN_RAM
-#define CFG_MONITOR_BASE 0x20000
+#define CONFIG_SYS_MONITOR_BASE 0x20000
#else
-#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
#endif
-#define CFG_MONITOR_LEN 0x40000
-#define CFG_MALLOC_LEN (256 << 10)
-#define CFG_BOOTPARAMS_LEN (64*1024)
+#define CONFIG_SYS_MONITOR_LEN 0x40000
+#define CONFIG_SYS_MALLOC_LEN (256 << 10)
+#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization ??
*/
-#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
+#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
/* FLASH organization */
-#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
-#define CFG_FLASH_ERASE_TOUT 1000
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
+#define CONFIG_SYS_FLASH_ERASE_TOUT 1000
-#define CFG_FLASH_CFI 1
+#define CONFIG_SYS_FLASH_CFI 1
#define CONFIG_FLASH_CFI_DRIVER 1
-#define CFG_FLASH_SIZE 0x200000
+#define CONFIG_SYS_FLASH_SIZE 0x200000
/* Cache Configuration */
-#define CFG_CACHELINE_SIZE 16
+#define CONFIG_SYS_CACHELINE_SIZE 16
/* Port configuration */
-#define CFG_FECI2C 0xF0
+#define CONFIG_SYS_FECI2C 0xF0
#endif /* _M5271EVB_H */