commit 6d0f6bcf337c5261c08fabe12982178c2c489d76
author Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Thu Oct 16 15:01:15 2008 +0200
committer Wolfgang Denk <wd@denx.de> Sat Oct 18 21:54:03 2008 +0200
tree ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f
parent 71edc271816ec82cf0550dd6980be2da3cc2ad9e

rename CFG_ macros to CONFIG_SYS

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

include/w83c553f.h

diff --git a/include/w83c553f.h b/include/w83c553f.h
index 88ea9da..6a76f5a 100644
--- a/include/w83c553f.h
+++ b/include/w83c553f.h
@@ -73,30 +73,30 @@
 /*
  * Interrupt controller
  */
-#define W83C553F_PIC1_ICW1	CFG_ISA_IO + 0x20
-#define W83C553F_PIC1_ICW2	CFG_ISA_IO + 0x21
-#define W83C553F_PIC1_ICW3	CFG_ISA_IO + 0x21
-#define W83C553F_PIC1_ICW4	CFG_ISA_IO + 0x21
-#define W83C553F_PIC1_OCW1	CFG_ISA_IO + 0x21
-#define W83C553F_PIC1_OCW2	CFG_ISA_IO + 0x20
-#define W83C553F_PIC1_OCW3	CFG_ISA_IO + 0x20
-#define W83C553F_PIC1_ELC	CFG_ISA_IO + 0x4D0
-#define W83C553F_PIC2_ICW1	CFG_ISA_IO + 0xA0
-#define W83C553F_PIC2_ICW2	CFG_ISA_IO + 0xA1
-#define W83C553F_PIC2_ICW3	CFG_ISA_IO + 0xA1
-#define W83C553F_PIC2_ICW4	CFG_ISA_IO + 0xA1
-#define W83C553F_PIC2_OCW1	CFG_ISA_IO + 0xA1
-#define W83C553F_PIC2_OCW2	CFG_ISA_IO + 0xA0
-#define W83C553F_PIC2_OCW3	CFG_ISA_IO + 0xA0
-#define W83C553F_PIC2_ELC	CFG_ISA_IO + 0x4D1
+#define W83C553F_PIC1_ICW1	CONFIG_SYS_ISA_IO + 0x20
+#define W83C553F_PIC1_ICW2	CONFIG_SYS_ISA_IO + 0x21
+#define W83C553F_PIC1_ICW3	CONFIG_SYS_ISA_IO + 0x21
+#define W83C553F_PIC1_ICW4	CONFIG_SYS_ISA_IO + 0x21
+#define W83C553F_PIC1_OCW1	CONFIG_SYS_ISA_IO + 0x21
+#define W83C553F_PIC1_OCW2	CONFIG_SYS_ISA_IO + 0x20
+#define W83C553F_PIC1_OCW3	CONFIG_SYS_ISA_IO + 0x20
+#define W83C553F_PIC1_ELC	CONFIG_SYS_ISA_IO + 0x4D0
+#define W83C553F_PIC2_ICW1	CONFIG_SYS_ISA_IO + 0xA0
+#define W83C553F_PIC2_ICW2	CONFIG_SYS_ISA_IO + 0xA1
+#define W83C553F_PIC2_ICW3	CONFIG_SYS_ISA_IO + 0xA1
+#define W83C553F_PIC2_ICW4	CONFIG_SYS_ISA_IO + 0xA1
+#define W83C553F_PIC2_OCW1	CONFIG_SYS_ISA_IO + 0xA1
+#define W83C553F_PIC2_OCW2	CONFIG_SYS_ISA_IO + 0xA0
+#define W83C553F_PIC2_OCW3	CONFIG_SYS_ISA_IO + 0xA0
+#define W83C553F_PIC2_ELC	CONFIG_SYS_ISA_IO + 0x4D1
 
-#define W83C553F_TMR1_CMOD	CFG_ISA_IO + 0x43
+#define W83C553F_TMR1_CMOD	CONFIG_SYS_ISA_IO + 0x43
 
 /*
  * DMA controller
  */
-#define W83C553F_DMA1	CFG_ISA_IO + 0x000	/* channel 0 - 3 */
-#define W83C553F_DMA2	CFG_ISA_IO + 0x0C0	/* channel 4 - 7 */
+#define W83C553F_DMA1	CONFIG_SYS_ISA_IO + 0x000	/* channel 0 - 3 */
+#define W83C553F_DMA2	CONFIG_SYS_ISA_IO + 0x0C0	/* channel 4 - 7 */
 
 /* command/status register bit definitions */