| commit | 6d73c23410cd0f8a54227dd0361fb8b9eadcb4b2 | [log] [tgz] |
|---|---|---|
| author | Fabio Estevam <fabio.estevam@freescale.com> | Wed Jan 29 17:39:49 2014 -0200 |
| committer | Stefano Babic <sbabic@denx.de> | Tue Feb 11 11:24:12 2014 +0100 |
| tree | 6e1b31648037762e47c487b94a271c14789d5c69 | |
| parent | 4702c62dce3e2e2648ae3c8d002202211de8c92a [diff] [blame] |
mx6: Enable L2 cache support Add L2 cache support and enable it by default. Configure the L2 cache in the same way as done by FSL kernel: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_4.1.0 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 514d634..eb107d3 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h
@@ -22,4 +22,9 @@ #define CONFIG_ARM_ERRATA_751472 #define CONFIG_BOARD_POSTCLK_INIT +#ifndef CONFIG_SYS_L2CACHE_OFF +#define CONFIG_SYS_L2_PL310 +#define CONFIG_SYS_PL310_BASE L2_PL310_BASE +#endif + #endif