commit 6ed83edfc006b1ca8e8848442ecf79bac8de4e80
author Patrick Delaunay <patrick.delaunay@st.com> Mon Jul 06 13:26:51 2020 +0200
committer Patrice Chotard <patrice.chotard@st.com> Tue Jul 28 18:06:19 2020 +0200
tree 721f790e653b34b3ebeff8972908c227ccb180e1
parent 090f2505d9249db7c17cd9adc8b3487a39e789e4

ARM: dts: rename stm32mp15xx-avenger96 ethernet0_rgmii_pins

Alignment with pins name used in Linux kernel v5.8.

It is a preleminary step for device tree alignment.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>

arch/arm/dts/stm32mp15-pinctrl.dtsi

diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi
index c385896..b0c2aa5 100644
--- a/arch/arm/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi
@@ -162,7 +162,7 @@
 		};
 	};
 
-	ethernet0_rgmii_pins_b: rgmii-1 {
+	ethernet0_rgmii_pins_c: rgmii-2 {
 		pins1 {
 			pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
 				 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
@@ -193,7 +193,7 @@
 		};
 	};
 
-	ethernet0_rgmii_pins_sleep_b: rgmii-sleep-1 {
+	ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
 		pins1 {
 			pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
 				 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */

arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts

diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts
index c1cc80b..88f25d8 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts
+++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts
@@ -89,8 +89,8 @@
 
 &ethernet0 {
 	status = "okay";
-	pinctrl-0 = <&ethernet0_rgmii_pins_b>;
-	pinctrl-1 = <&ethernet0_rgmii_pins_sleep_b>;
+	pinctrl-0 = <&ethernet0_rgmii_pins_c>;
+	pinctrl-1 = <&ethernet0_rgmii_sleep_pins_c>;
 	pinctrl-names = "default", "sleep";
 	phy-mode = "rgmii";
 	max-speed = <1000>;