rtc: rx8025: revise single register write to use offset
Writing of individual registers was not functioning
correctly as a 0 'offset' byte under DM-managed
I2C was being appended in front of register we
wanted to access.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
diff --git a/drivers/rtc/rx8025.c b/drivers/rtc/rx8025.c
index 9423a1b..1394c23 100644
--- a/drivers/rtc/rx8025.c
+++ b/drivers/rtc/rx8025.c
@@ -214,11 +214,14 @@
*/
static int rtc_write(struct udevice *dev, uchar reg, uchar val)
{
- uchar buf[2];
- buf[0] = reg << 4;
- buf[1] = val;
+ /* The RX8025/RX8035 uses the top 4 bits of the
+ * 'offset' byte as the start register address,
+ * and the bottom 4 bits as a 'transfer' mode setting
+ * (only applicable for reads)
+ */
+ u8 offset = (reg << 4);
- if (dm_i2c_write(dev, 0, buf, 2)) {
+ if (dm_i2c_reg_write(dev, offset, val)) {
printf("Error writing to RTC\n");
return -EIO;
}