fdff1f96a6505bccb258f5b52e6c94c7e0b29512 - platform/external/u-boot

commit	fdff1f96a6505bccb258f5b52e6c94c7e0b29512	[log] [tgz]
author	Anup Patel <Anup.Patel@wdc.com>	Mon Feb 25 08:14:10 2019 +0000
committer	Andes <uboot@andestech.com>	Wed Feb 27 09:12:33 2019 +0800
tree	158b092ab1119bcab415f46c91f5a5865db0ea1c
parent	7c8d210b91a192e89be3bfc9c0e943422df108b0 [diff]

riscv: Rename cpu/qemu to cpu/generic

The QEMU CPU support under arch/riscv is pretty much generic
and works fine for SiFive Unleashed as well. In fact, there
will be quite a few RISC-V SOCs for which QEMU CPU support
will work fine.

This patch renames cpu/qemu to cpu/generic to indicate the
above fact. If there are SOC specific errata workarounds
required in cpu/generic then those can be done at runtime
in cpu/generic based on CPU vendor specific DT compatible
string.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

arch/riscv/Kconfig[diff]
arch/riscv/cpu/generic/Kconfig[Renamed from arch/riscv/cpu/qemu/Kconfig - diff]
arch/riscv/cpu/generic/Makefile[Renamed from arch/riscv/cpu/qemu/Makefile - diff]
arch/riscv/cpu/generic/cpu.c[Renamed from arch/riscv/cpu/qemu/cpu.c - diff]
arch/riscv/cpu/generic/dram.c[Renamed from arch/riscv/cpu/qemu/dram.c - diff]
board/emulation/qemu-riscv/Kconfig[diff]

6 files changed

tree: 158b092ab1119bcab415f46c91f5a5865db0ea1c