| commit | 7262ff7e564c8b7d81f940af242c20f832ee7511 | [log] [tgz] |
|---|---|---|
| author | Vignesh Raghavendra <vigneshr@ti.com> | Mon Mar 07 14:55:51 2022 +0530 |
| committer | Tom Rini <trini@konsulko.com> | Mon Apr 11 11:39:19 2022 -0400 |
| tree | 1f9c0de78eee845b61608d18aa74ccc7b9e34b80 | |
| parent | 1583c87b1b813a04c95732ae8075d79b14a26eea [diff] |
ARM: dts: k3-j721s2: Correct timer frequency MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears incorrect. Without this delays in R5 SPL are 10x off. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>