Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Beside some rather unexciting sync of the DTs from the kernel tree, and
some Kconfig cleanup, there are some improvements for the ARMv5 Allwinner
family, to support boards with the F1C200s (64MB DRAM) better. We will
get actual board support as soon as the DTs have passed the Linux review
process.
There is also support for the X96 Mate TV Box, featuring the H616 SoC and
a full 4GB of DRAM.
Also we found the secret to enable SPI booting on the H616 (pin PC5 must
be pulled to GND), so the SPI boot support patch is now good to go.
Passed the gitlab CI, plus briefly tested on Pine64-LTS, LicheePi Nano,
X96 Mate and OrangePi Zero.
diff --git a/Kconfig b/Kconfig
index 2ea735d..d297513 100644
--- a/Kconfig
+++ b/Kconfig
@@ -312,9 +312,9 @@
default 0x4000000 if SANDBOX
default 0x2000000 if ARCH_ROCKCHIP || ARCH_OMAP2PLUS || ARCH_MESON
default 0x200000 if ARCH_BMIPS || X86
- default 0x120000 if MACH_SUNIV
- default 0x220000 if MACH_SUN8I_V3S
- default 0x4020000 if ARCH_SUNXI
+ default 0x4020000 if SUNXI_MINIMUM_DRAM_MB >= 256
+ default 0x220000 if SUNXI_MINIMUM_DRAM_MB >= 64
+ default 0x120000 if SUNXI_MINIMUM_DRAM_MB >= 32
default 0x400000
help
This defines memory to be allocated for Dynamic allocation
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 54bff65..162d108 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -713,7 +713,8 @@
sun50i-h6-tanix-tx6.dtb \
sun50i-h6-tanix-tx6-mini.dtb
dtb-$(CONFIG_MACH_SUN50I_H616) += \
- sun50i-h616-orangepi-zero2.dtb
+ sun50i-h616-orangepi-zero2.dtb \
+ sun50i-h616-x96-mate.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-amarula-relic.dtb \
sun50i-a64-bananapi-m64.dtb \
diff --git a/arch/arm/dts/sun4i-a10-inet9f-rev03.dts b/arch/arm/dts/sun4i-a10-inet9f-rev03.dts
index 0a562b2..62e7aa5 100644
--- a/arch/arm/dts/sun4i-a10-inet9f-rev03.dts
+++ b/arch/arm/dts/sun4i-a10-inet9f-rev03.dts
@@ -63,7 +63,7 @@
compatible = "gpio-keys-polled";
poll-interval = <20>;
- left-joystick-left {
+ event-left-joystick-left {
label = "Left Joystick Left";
linux,code = <ABS_X>;
linux,input-type = <EV_ABS>;
@@ -71,7 +71,7 @@
gpios = <&pio 0 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA6 */
};
- left-joystick-right {
+ event-left-joystick-right {
label = "Left Joystick Right";
linux,code = <ABS_X>;
linux,input-type = <EV_ABS>;
@@ -79,7 +79,7 @@
gpios = <&pio 0 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA5 */
};
- left-joystick-up {
+ event-left-joystick-up {
label = "Left Joystick Up";
linux,code = <ABS_Y>;
linux,input-type = <EV_ABS>;
@@ -87,7 +87,7 @@
gpios = <&pio 0 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA8 */
};
- left-joystick-down {
+ event-left-joystick-down {
label = "Left Joystick Down";
linux,code = <ABS_Y>;
linux,input-type = <EV_ABS>;
@@ -95,7 +95,7 @@
gpios = <&pio 0 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA9 */
};
- right-joystick-left {
+ event-right-joystick-left {
label = "Right Joystick Left";
linux,code = <ABS_Z>;
linux,input-type = <EV_ABS>;
@@ -103,7 +103,7 @@
gpios = <&pio 0 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA1 */
};
- right-joystick-right {
+ event-right-joystick-right {
label = "Right Joystick Right";
linux,code = <ABS_Z>;
linux,input-type = <EV_ABS>;
@@ -111,7 +111,7 @@
gpios = <&pio 0 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA0 */
};
- right-joystick-up {
+ event-right-joystick-up {
label = "Right Joystick Up";
linux,code = <ABS_RZ>;
linux,input-type = <EV_ABS>;
@@ -119,7 +119,7 @@
gpios = <&pio 0 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA3 */
};
- right-joystick-down {
+ event-right-joystick-down {
label = "Right Joystick Down";
linux,code = <ABS_RZ>;
linux,input-type = <EV_ABS>;
@@ -127,7 +127,7 @@
gpios = <&pio 0 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA4 */
};
- dpad-left {
+ event-dpad-left {
label = "DPad Left";
linux,code = <ABS_HAT0X>;
linux,input-type = <EV_ABS>;
@@ -135,7 +135,7 @@
gpios = <&pio 7 23 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH23 */
};
- dpad-right {
+ event-dpad-right {
label = "DPad Right";
linux,code = <ABS_HAT0X>;
linux,input-type = <EV_ABS>;
@@ -143,7 +143,7 @@
gpios = <&pio 7 24 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH24 */
};
- dpad-up {
+ event-dpad-up {
label = "DPad Up";
linux,code = <ABS_HAT0Y>;
linux,input-type = <EV_ABS>;
@@ -151,7 +151,7 @@
gpios = <&pio 7 25 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH25 */
};
- dpad-down {
+ event-dpad-down {
label = "DPad Down";
linux,code = <ABS_HAT0Y>;
linux,input-type = <EV_ABS>;
@@ -159,49 +159,49 @@
gpios = <&pio 7 26 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH26 */
};
- x {
+ event-x {
label = "Button X";
linux,code = <BTN_X>;
gpios = <&pio 0 16 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA16 */
};
- y {
+ event-y {
label = "Button Y";
linux,code = <BTN_Y>;
gpios = <&pio 0 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA14 */
};
- a {
+ event-a {
label = "Button A";
linux,code = <BTN_A>;
gpios = <&pio 0 17 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA17 */
};
- b {
+ event-b {
label = "Button B";
linux,code = <BTN_B>;
gpios = <&pio 0 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA15 */
};
- select {
+ event-select {
label = "Select Button";
linux,code = <BTN_SELECT>;
gpios = <&pio 0 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA11 */
};
- start {
+ event-start {
label = "Start Button";
linux,code = <BTN_START>;
gpios = <&pio 0 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA12 */
};
- top-left {
+ event-top-left {
label = "Top Left Button";
linux,code = <BTN_TL>;
gpios = <&pio 7 22 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH22 */
};
- top-right {
+ event-top-right {
label = "Top Right Button";
linux,code = <BTN_TR>;
gpios = <&pio 0 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA13 */
diff --git a/arch/arm/dts/sun4i-a10-pcduino.dts b/arch/arm/dts/sun4i-a10-pcduino.dts
index 1ac8237..a332d61 100644
--- a/arch/arm/dts/sun4i-a10-pcduino.dts
+++ b/arch/arm/dts/sun4i-a10-pcduino.dts
@@ -77,19 +77,19 @@
gpio-keys {
compatible = "gpio-keys";
- back {
+ key-back {
label = "Key Back";
linux,code = <KEY_BACK>;
gpios = <&pio 7 17 GPIO_ACTIVE_LOW>;
};
- home {
+ key-home {
label = "Key Home";
linux,code = <KEY_HOME>;
gpios = <&pio 7 18 GPIO_ACTIVE_LOW>;
};
- menu {
+ key-menu {
label = "Key Menu";
linux,code = <KEY_MENU>;
gpios = <&pio 7 19 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/dts/sun50i-a64-amarula-relic.dts b/arch/arm/dts/sun50i-a64-amarula-relic.dts
index c7bd73f3..ce8f6aa 100644
--- a/arch/arm/dts/sun50i-a64-amarula-relic.dts
+++ b/arch/arm/dts/sun50i-a64-amarula-relic.dts
@@ -58,7 +58,7 @@
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* WL-PMU-EN: PL2 */
};
diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts
index f7fe9fa..bf66b64 100644
--- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts
@@ -56,7 +56,7 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
};
};
@@ -355,7 +355,7 @@
bluetooth {
compatible = "brcm,bcm43438-bt";
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "lpo";
vbat-supply = <®_dldo2>;
vddio-supply = <®_dldo4>;
diff --git a/arch/arm/dts/sun50i-a64-nanopi-a64.dts b/arch/arm/dts/sun50i-a64-nanopi-a64.dts
index 09b3c7f..ffc3b4c 100644
--- a/arch/arm/dts/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm/dts/sun50i-a64-nanopi-a64.dts
@@ -43,7 +43,7 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};
diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts b/arch/arm/dts/sun50i-a64-olinuxino.dts
index f3f8e17..22d3502 100644
--- a/arch/arm/dts/sun50i-a64-olinuxino.dts
+++ b/arch/arm/dts/sun50i-a64-olinuxino.dts
@@ -58,6 +58,15 @@
};
};
+&codec {
+ status = "okay";
+};
+
+&codec_analog {
+ cpvdd-supply = <®_eldo1>;
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <®_dcdc2>;
};
@@ -74,6 +83,10 @@
cpu-supply = <®_dcdc2>;
};
+&dai {
+ status = "okay";
+};
+
&de {
status = "okay";
};
@@ -328,6 +341,23 @@
vcc-hdmi-supply = <®_dldo1>;
};
+&sound {
+ simple-audio-card,aux-devs = <&codec_analog>;
+ simple-audio-card,widgets = "Microphone", "Microphone Jack Left",
+ "Microphone", "Microphone Jack Right",
+ "Headphone", "Headphone Jack";
+ simple-audio-card,routing = "Left DAC", "DACL",
+ "Right DAC", "DACR",
+ "Headphone Jack", "HP",
+ "ADCL", "Left ADC",
+ "ADCR", "Right ADC",
+ "Microphone Jack Left", "MBIAS",
+ "MIC1", "Microphone Jack Left",
+ "Microphone Jack Right", "MBIAS",
+ "MIC2", "Microphone Jack Right";
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts
index 8eee805..714a270 100644
--- a/arch/arm/dts/sun50i-a64-orangepi-win.dts
+++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts
@@ -40,7 +40,7 @@
leds {
compatible = "gpio-leds";
- status {
+ led-0 {
label = "orangepi:green:status";
gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
};
@@ -71,7 +71,7 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
};
};
@@ -369,7 +369,7 @@
bluetooth {
compatible = "brcm,bcm43438-bt";
max-speed = <1500000>;
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "lpo";
vbat-supply = <®_dldo2>;
vddio-supply = <®_dldo4>;
diff --git a/arch/arm/dts/sun50i-a64-pinebook.dts b/arch/arm/dts/sun50i-a64-pinebook.dts
index 68b6ab4..c00c4c1 100644
--- a/arch/arm/dts/sun50i-a64-pinebook.dts
+++ b/arch/arm/dts/sun50i-a64-pinebook.dts
@@ -35,10 +35,10 @@
stdout-path = "serial0:115200n8";
};
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- lid_switch {
+ lid-switch {
label = "Lid Switch";
gpios = <&r_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
linux,input-type = <EV_SW>;
diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.0.dts b/arch/arm/dts/sun50i-a64-pinephone-1.0.dts
index fb65319..219f720 100644
--- a/arch/arm/dts/sun50i-a64-pinephone-1.0.dts
+++ b/arch/arm/dts/sun50i-a64-pinephone-1.0.dts
@@ -10,6 +10,10 @@
compatible = "pine64,pinephone-1.0", "pine64,pinephone", "allwinner,sun50i-a64";
};
+&codec_analog {
+ allwinner,internal-bias-resistor;
+};
+
&sgm3140 {
enable-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */
flash-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.1.dts b/arch/arm/dts/sun50i-a64-pinephone-1.1.dts
index 5e59d37..723af64 100644
--- a/arch/arm/dts/sun50i-a64-pinephone-1.1.dts
+++ b/arch/arm/dts/sun50i-a64-pinephone-1.1.dts
@@ -29,6 +29,10 @@
default-brightness-level = <400>;
};
+&codec_analog {
+ allwinner,internal-bias-resistor;
+};
+
&sgm3140 {
enable-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
flash-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */
diff --git a/arch/arm/dts/sun50i-a64-teres-i.dts b/arch/arm/dts/sun50i-a64-teres-i.dts
index 6668431..945afdb 100644
--- a/arch/arm/dts/sun50i-a64-teres-i.dts
+++ b/arch/arm/dts/sun50i-a64-teres-i.dts
@@ -197,6 +197,14 @@
status = "okay";
};
+&pio {
+ vcc-pc-supply = <®_dcdc1>;
+ vcc-pd-supply = <®_dldo2>;
+ vcc-pe-supply = <®_aldo1>;
+ vcc-pf-supply = <®_dcdc1>; /* No dedicated supply-pin for this */
+ vcc-pg-supply = <®_aldo2>;
+};
+
&pwm {
status = "okay";
};
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index 555bc92..b04f492 100644
--- a/arch/arm/dts/sun50i-a64.dtsi
+++ b/arch/arm/dts/sun50i-a64.dtsi
@@ -4,6 +4,7 @@
// Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
#include <dt-bindings/clock/sun50i-a64-ccu.h>
+#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-r-ccu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -660,7 +661,7 @@
ccu: clock@1c20000 {
compatible = "allwinner,sun50i-a64-ccu";
reg = <0x01c20000 0x400>;
- clocks = <&osc24M>, <&rtc 0>;
+ clocks = <&osc24M>, <&rtc CLK_OSC32K>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
@@ -672,7 +673,8 @@
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
+ <&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
@@ -1224,7 +1226,7 @@
reg-io-width = <1>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
- <&ccu CLK_HDMI>, <&rtc 0>;
+ <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>;
clock-names = "iahb", "isfr", "tmds", "cec";
resets = <&ccu RST_BUS_HDMI1>;
reset-names = "ctrl";
@@ -1284,7 +1286,7 @@
r_ccu: clock@1f01400 {
compatible = "allwinner,sun50i-a64-r-ccu";
reg = <0x01f01400 0x100>;
- clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
+ clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
<&ccu CLK_PLL_PERIPH0>;
clock-names = "hosc", "losc", "iosc", "pll-periph";
#clock-cells = <1>;
diff --git a/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts b/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts
index 55b3695..a3e040d 100644
--- a/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts
+++ b/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts
@@ -52,10 +52,10 @@
};
};
- r-gpio-keys {
+ gpio-keys {
compatible = "gpio-keys";
- reset {
+ key-reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
index 1010c1b..b5c1ff1 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
@@ -54,10 +54,10 @@
};
};
- r-gpio-keys {
+ gpio-keys {
compatible = "gpio-keys";
- sw4 {
+ key-sw4 {
label = "sw4";
linux,code = <BTN_0>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts
index 74e0444..d7f8bad 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts
@@ -48,10 +48,10 @@
};
};
- r-gpio-keys {
+ gpio-keys {
compatible = "gpio-keys";
- sw4 {
+ key-sw4 {
label = "sw4";
linux,code = <BTN_0>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/dts/sun50i-h6-orangepi-3.dts b/arch/arm/dts/sun50i-h6-orangepi-3.dts
index 9f12c05..f1957bb 100644
--- a/arch/arm/dts/sun50i-h6-orangepi-3.dts
+++ b/arch/arm/dts/sun50i-h6-orangepi-3.dts
@@ -86,7 +86,7 @@
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
post-power-on-delay-ms = <200>;
@@ -314,7 +314,7 @@
bluetooth {
compatible = "brcm,bcm4345c5";
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "lpo";
device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */
diff --git a/arch/arm/dts/sun50i-h6-orangepi-lite2.dts b/arch/arm/dts/sun50i-h6-orangepi-lite2.dts
index e877085..fb31dcb 100644
--- a/arch/arm/dts/sun50i-h6-orangepi-lite2.dts
+++ b/arch/arm/dts/sun50i-h6-orangepi-lite2.dts
@@ -13,7 +13,7 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
post-power-on-delay-ms = <200>;
@@ -64,7 +64,7 @@
bluetooth {
compatible = "brcm,bcm4345c5";
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "lpo";
device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */
diff --git a/arch/arm/dts/sun50i-h6-tanix.dtsi b/arch/arm/dts/sun50i-h6-tanix.dtsi
index edb71e4..4903d63 100644
--- a/arch/arm/dts/sun50i-h6-tanix.dtsi
+++ b/arch/arm/dts/sun50i-h6-tanix.dtsi
@@ -78,7 +78,7 @@
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
};
diff --git a/arch/arm/dts/sun50i-h6.dtsi b/arch/arm/dts/sun50i-h6.dtsi
index 71a45a6..afbbfc2 100644
--- a/arch/arm/dts/sun50i-h6.dtsi
+++ b/arch/arm/dts/sun50i-h6.dtsi
@@ -4,6 +4,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun50i-h6-ccu.h>
#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
+#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-tcon-top.h>
#include <dt-bindings/reset/sun50i-h6-ccu.h>
@@ -237,7 +238,7 @@
ccu: clock@3001000 {
compatible = "allwinner,sun50i-h6-ccu";
reg = <0x03001000 0x1000>;
- clocks = <&osc24M>, <&rtc 0>, <&rtc 2>;
+ clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>;
clock-names = "hosc", "losc", "iosc";
#clock-cells = <1>;
#reset-cells = <1>;
@@ -316,7 +317,7 @@
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc 0>;
+ clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
@@ -724,7 +725,7 @@
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_XHCI>,
<&ccu CLK_BUS_XHCI>,
- <&rtc 0>;
+ <&rtc CLK_OSC32K>;
clock-names = "ref", "bus_early", "suspend";
resets = <&ccu RST_BUS_XHCI>;
/*
@@ -929,7 +930,7 @@
r_ccu: clock@7010000 {
compatible = "allwinner,sun50i-h6-r-ccu";
reg = <0x07010000 0x400>;
- clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
+ clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
<&ccu CLK_PLL_PERIPH0>;
clock-names = "hosc", "losc", "iosc", "pll-periph";
#clock-cells = <1>;
@@ -958,7 +959,8 @@
reg = <0x07022000 0x400>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>;
+ clocks = <&r_ccu CLK_R_APB1>, <&osc24M>,
+ <&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts
index e6de49f..02893f3 100644
--- a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts
+++ b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts
@@ -49,29 +49,8 @@
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
-
- reg_usb1_vbus: usb1-vbus {
- compatible = "regulator-fixed";
- regulator-name = "usb1-vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <®_vcc5v>;
- enable-active-high;
- gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
- status = "okay";
- };
};
-&ehci0 {
- status = "okay";
-};
-
-&ehci1 {
- status = "okay";
-};
-
-/* USB 2 & 3 are on headers only. */
-
&emac0 {
pinctrl-names = "default";
pinctrl-0 = <&ext_rgmii_pins>;
@@ -97,14 +76,6 @@
status = "okay";
};
-&ohci0 {
- status = "okay";
-};
-
-&ohci1 {
- status = "okay";
-};
-
&r_rsb {
status = "okay";
@@ -181,14 +152,14 @@
reg_dcdca: dcdca {
regulator-always-on;
regulator-min-microvolt = <810000>;
- regulator-max-microvolt = <1080000>;
+ regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpu";
};
reg_dcdcc: dcdcc {
regulator-always-on;
regulator-min-microvolt = <810000>;
- regulator-max-microvolt = <1080000>;
+ regulator-max-microvolt = <990000>;
regulator-name = "vdd-gpu-sys";
};
@@ -200,7 +171,7 @@
};
reg_dcdce: dcdce {
- regulator-boot-on;
+ regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-eth-mmc";
@@ -213,8 +184,18 @@
};
};
+&pio {
+ vcc-pc-supply = <®_aldo1>;
+ vcc-pf-supply = <®_aldo1>;
+ vcc-pg-supply = <®_bldo1>;
+ vcc-ph-supply = <®_aldo1>;
+ vcc-pi-supply = <®_aldo1>;
+};
+
&spi0 {
status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
flash@0 {
#address-cells = <1>;
@@ -230,13 +211,3 @@
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};
-
-&usbotg {
- dr_mode = "peripheral";
- status = "okay";
-};
-
-&usbphy {
- usb1_vbus-supply = <®_usb1_vbus>;
- status = "okay";
-};
diff --git a/arch/arm/dts/sun50i-h616-x96-mate.dts b/arch/arm/dts/sun50i-h616-x96-mate.dts
new file mode 100644
index 0000000..6619db3
--- /dev/null
+++ b/arch/arm/dts/sun50i-h616-x96-mate.dts
@@ -0,0 +1,177 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2021 Arm Ltd.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ model = "X96 Mate";
+ compatible = "hechuang,x96-mate", "allwinner,sun50i-h616";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ reg_vcc5v: vcc5v {
+ /* board wide 5V supply directly from the DC input */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+};
+
+&ir {
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <®_dcdce>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ bus-width = <4>;
+ status = "okay";
+};
+
+&mmc2 {
+ vmmc-supply = <®_dcdce>;
+ vqmmc-supply = <®_bldo1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp305: pmic@745 {
+ compatible = "x-powers,axp305", "x-powers,axp805",
+ "x-powers,axp806";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x745>;
+
+ x-powers,self-working-mode;
+ vina-supply = <®_vcc5v>;
+ vinb-supply = <®_vcc5v>;
+ vinc-supply = <®_vcc5v>;
+ vind-supply = <®_vcc5v>;
+ vine-supply = <®_vcc5v>;
+ aldoin-supply = <®_vcc5v>;
+ bldoin-supply = <®_vcc5v>;
+ cldoin-supply = <®_vcc5v>;
+
+ regulators {
+ reg_aldo1: aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-sys";
+ };
+
+ /* Enabled by the Android BSP */
+ reg_aldo2: aldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3-ext";
+ status = "disabled";
+ };
+
+ /* Enabled by the Android BSP */
+ reg_aldo3: aldo3 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3-ext2";
+ status = "disabled";
+ };
+
+ reg_bldo1: bldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc1v8";
+ };
+
+ /* Enabled by the Android BSP */
+ reg_bldo2: bldo2 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc1v8-2";
+ status = "disabled";
+ };
+
+ bldo3 {
+ /* unused */
+ };
+
+ bldo4 {
+ /* unused */
+ };
+
+ cldo1 {
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-name = "vcc2v5";
+ };
+
+ cldo2 {
+ /* unused */
+ };
+
+ cldo3 {
+ /* unused */
+ };
+
+ reg_dcdca: dcdca {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdcc: dcdcc {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <990000>;
+ regulator-name = "vdd-gpu-sys";
+ };
+
+ reg_dcdcd: dcdcd {
+ regulator-always-on;
+ regulator-min-microvolt = <1360000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-dram";
+ };
+
+ reg_dcdce: dcdce {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-eth-mmc";
+ };
+
+ sw {
+ /* unused */
+ };
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-h616.dtsi b/arch/arm/dts/sun50i-h616.dtsi
index 2f71e85..622a1f7 100644
--- a/arch/arm/dts/sun50i-h616.dtsi
+++ b/arch/arm/dts/sun50i-h616.dtsi
@@ -6,6 +6,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun50i-h616-ccu.h>
#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
+#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/reset/sun50i-h616-ccu.h>
#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
@@ -51,7 +52,23 @@
};
};
- osc24M: osc24M_clk {
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /*
+ * 256 KiB reserved for Trusted Firmware-A (BL31).
+ * This is added by BL31 itself, but some bootloaders fail
+ * to propagate this into the DTB handed to kernels.
+ */
+ secmon@40000000 {
+ reg = <0x0 0x40000000 0x0 0x40000>;
+ no-map;
+ };
+ };
+
+ osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
@@ -110,7 +127,7 @@
ccu: clock@3001000 {
compatible = "allwinner,sun50i-h616-ccu";
reg = <0x03001000 0x1000>;
- clocks = <&osc24M>, <&rtc 0>, <&rtc 2>;
+ clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>;
clock-names = "hosc", "losc", "iosc";
#clock-cells = <1>;
#reset-cells = <1>;
@@ -135,7 +152,7 @@
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc 0>;
+ clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
@@ -161,7 +178,7 @@
function = "i2c3";
};
- ir_rx_pin: ir_rx_pin {
+ ir_rx_pin: ir-rx-pin {
pins = "PH10";
function = "ir_rx";
};
@@ -174,6 +191,7 @@
bias-pull-up;
};
+ /omit-if-no-ref/
mmc1_pins: mmc1-pins {
pins = "PG0", "PG1", "PG2", "PG3",
"PG4", "PG5";
@@ -191,17 +209,26 @@
bias-pull-up;
};
+ /omit-if-no-ref/
spi0_pins: spi0-pins {
- pins = "PC0", "PC2", "PC3", "PC4";
+ pins = "PC0", "PC2", "PC4";
function = "spi0";
};
+ /omit-if-no-ref/
+ spi0_cs0_pin: spi0-cs0-pin {
+ pins = "PC3";
+ function = "spi0";
+ };
+
+ /omit-if-no-ref/
spi1_pins: spi1-pins {
pins = "PH6", "PH7", "PH8";
function = "spi1";
};
- spi1_cs_pin: spi1-cs-pin {
+ /omit-if-no-ref/
+ spi1_cs0_pin: spi1-cs0-pin {
pins = "PH5";
function = "spi1";
};
@@ -211,11 +238,13 @@
function = "uart0";
};
+ /omit-if-no-ref/
uart1_pins: uart1-pins {
pins = "PG6", "PG7";
function = "uart1";
};
+ /omit-if-no-ref/
uart1_rts_cts_pins: uart1-rts-cts-pins {
pins = "PG8", "PG9";
function = "uart1";
@@ -245,10 +274,10 @@
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
status = "disabled";
+ max-frequency = <150000000>;
cap-sd-highspeed;
cap-mmc-highspeed;
mmc-ddr-3_3v;
- mmc-ddr-1_8v;
cap-sdio-irq;
#address-cells = <1>;
#size-cells = <0>;
@@ -266,10 +295,10 @@
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
status = "disabled";
+ max-frequency = <150000000>;
cap-sd-highspeed;
cap-mmc-highspeed;
mmc-ddr-3_3v;
- mmc-ddr-1_8v;
cap-sdio-irq;
#address-cells = <1>;
#size-cells = <0>;
@@ -287,10 +316,10 @@
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
status = "disabled";
+ max-frequency = <150000000>;
cap-sd-highspeed;
cap-mmc-highspeed;
mmc-ddr-3_3v;
- mmc-ddr-1_8v;
cap-sdio-irq;
#address-cells = <1>;
#size-cells = <0>;
@@ -364,6 +393,7 @@
i2c0: i2c@5002000 {
compatible = "allwinner,sun50i-h616-i2c",
+ "allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x05002000 0x400>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
@@ -378,6 +408,7 @@
i2c1: i2c@5002400 {
compatible = "allwinner,sun50i-h616-i2c",
+ "allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x05002400 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
@@ -390,6 +421,7 @@
i2c2: i2c@5002800 {
compatible = "allwinner,sun50i-h616-i2c",
+ "allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x05002800 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
@@ -402,6 +434,7 @@
i2c3: i2c@5002c00 {
compatible = "allwinner,sun50i-h616-i2c",
+ "allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x05002c00 0x400>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
@@ -414,6 +447,7 @@
i2c4: i2c@5003000 {
compatible = "allwinner,sun50i-h616-i2c",
+ "allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x05003000 0x400>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
@@ -432,8 +466,6 @@
clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
clock-names = "ahb", "mod";
resets = <&ccu RST_BUS_SPI0>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@@ -447,24 +479,22 @@
clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
clock-names = "ahb", "mod";
resets = <&ccu RST_BUS_SPI1>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi1_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
emac0: ethernet@5020000 {
- compatible = "allwinner,sun50i-h616-emac",
+ compatible = "allwinner,sun50i-h616-emac0",
"allwinner,sun50i-a64-emac";
- syscon = <&syscon>;
reg = <0x05020000 0x10000>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
- resets = <&ccu RST_BUS_EMAC0>;
- reset-names = "stmmaceth";
clocks = <&ccu CLK_BUS_EMAC0>;
clock-names = "stmmaceth";
+ resets = <&ccu RST_BUS_EMAC0>;
+ reset-names = "stmmaceth";
+ syscon = <&syscon>;
status = "disabled";
mdio0: mdio {
@@ -474,197 +504,21 @@
};
};
- emac1: ethernet@5030000 {
- compatible = "allwinner,sun50i-h616-emac";
- syscon = <&syscon 1>;
- reg = <0x05030000 0x10000>;
- interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- resets = <&ccu RST_BUS_EMAC1>;
- reset-names = "stmmaceth";
- clocks = <&ccu CLK_BUS_EMAC1>;
- clock-names = "stmmaceth";
- status = "disabled";
-
- mdio1: mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-
- usbotg: usb@5100000 {
- compatible = "allwinner,sun50i-h616-musb",
- "allwinner,sun8i-h3-musb";
- reg = <0x05100000 0x0400>;
- clocks = <&ccu CLK_BUS_OTG>;
- resets = <&ccu RST_BUS_OTG>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "mc";
- phys = <&usbphy 0>;
- phy-names = "usb";
- extcon = <&usbphy 0>;
- status = "disabled";
- };
-
- usbphy: phy@5100400 {
- compatible = "allwinner,sun50i-h616-usb-phy";
- reg = <0x05100400 0x24>,
- <0x05101800 0x14>,
- <0x05200800 0x14>,
- <0x05310800 0x14>,
- <0x05311800 0x14>;
- reg-names = "phy_ctrl",
- "pmu0",
- "pmu1",
- "pmu2",
- "pmu3";
- clocks = <&ccu CLK_USB_PHY0>,
- <&ccu CLK_USB_PHY1>,
- <&ccu CLK_USB_PHY2>,
- <&ccu CLK_USB_PHY3>;
- clock-names = "usb0_phy",
- "usb1_phy",
- "usb2_phy",
- "usb3_phy";
- resets = <&ccu RST_USB_PHY0>,
- <&ccu RST_USB_PHY1>,
- <&ccu RST_USB_PHY2>,
- <&ccu RST_USB_PHY3>;
- reset-names = "usb0_reset",
- "usb1_reset",
- "usb2_reset",
- "usb3_reset";
- status = "disabled";
- #phy-cells = <1>;
- };
-
- ehci0: usb@5101000 {
- compatible = "allwinner,sun50i-h616-ehci",
- "generic-ehci";
- reg = <0x05101000 0x100>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_OHCI0>,
- <&ccu CLK_BUS_EHCI0>,
- <&ccu CLK_USB_OHCI0>;
- resets = <&ccu RST_BUS_OHCI0>,
- <&ccu RST_BUS_EHCI0>;
- phys = <&usbphy 0>;
- phy-names = "usb";
- status = "disabled";
- };
-
- ohci0: usb@5101400 {
- compatible = "allwinner,sun50i-h616-ohci",
- "generic-ohci";
- reg = <0x05101400 0x100>;
- interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_OHCI0>,
- <&ccu CLK_USB_OHCI0>;
- resets = <&ccu RST_BUS_OHCI0>;
- phys = <&usbphy 0>;
- phy-names = "usb";
- status = "disabled";
- };
-
- ehci1: usb@5200000 {
- compatible = "allwinner,sun50i-h616-ehci",
- "generic-ehci";
- reg = <0x05200000 0x100>;
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_OHCI1>,
- <&ccu CLK_BUS_EHCI1>,
- <&ccu CLK_USB_OHCI1>;
- resets = <&ccu RST_BUS_OHCI1>,
- <&ccu RST_BUS_EHCI1>;
- phys = <&usbphy 1>;
- phy-names = "usb";
- status = "disabled";
- };
-
- ohci1: usb@5200400 {
- compatible = "allwinner,sun50i-h616-ohci",
- "generic-ohci";
- reg = <0x05200400 0x100>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_OHCI1>,
- <&ccu CLK_USB_OHCI1>;
- resets = <&ccu RST_BUS_OHCI1>;
- phys = <&usbphy 1>;
- phy-names = "usb";
- status = "disabled";
- };
-
- ehci2: usb@5310000 {
- compatible = "allwinner,sun50i-h616-ehci",
- "generic-ehci";
- reg = <0x05310000 0x100>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_OHCI2>,
- <&ccu CLK_BUS_EHCI2>,
- <&ccu CLK_USB_OHCI2>;
- resets = <&ccu RST_BUS_OHCI2>,
- <&ccu RST_BUS_EHCI2>;
- phys = <&usbphy 2>;
- phy-names = "usb";
- status = "disabled";
- };
-
- ohci2: usb@5310400 {
- compatible = "allwinner,sun50i-h616-ohci",
- "generic-ohci";
- reg = <0x05310400 0x100>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_OHCI2>,
- <&ccu CLK_USB_OHCI2>;
- resets = <&ccu RST_BUS_OHCI2>;
- phys = <&usbphy 2>;
- phy-names = "usb";
- status = "disabled";
- };
-
- ehci3: usb@5311000 {
- compatible = "allwinner,sun50i-h616-ehci",
- "generic-ehci";
- reg = <0x05311000 0x100>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_OHCI3>,
- <&ccu CLK_BUS_EHCI3>,
- <&ccu CLK_USB_OHCI3>;
- resets = <&ccu RST_BUS_OHCI3>,
- <&ccu RST_BUS_EHCI3>;
- phys = <&usbphy 3>;
- phy-names = "usb";
- status = "disabled";
- };
-
- ohci3: usb@5311400 {
- compatible = "allwinner,sun50i-h616-ohci",
- "generic-ohci";
- reg = <0x05311400 0x100>;
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_OHCI3>,
- <&ccu CLK_USB_OHCI3>;
- resets = <&ccu RST_BUS_OHCI3>;
- phys = <&usbphy 3>;
- phy-names = "usb";
- status = "disabled";
- };
-
rtc: rtc@7000000 {
- compatible = "allwinner,sun50i-h616-rtc",
- "allwinner,sun50i-h6-rtc";
+ compatible = "allwinner,sun50i-h616-rtc";
reg = <0x07000000 0x400>;
- interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
- clock-output-names = "osc32k", "osc32k-out", "iosc";
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_R_APB1_RTC>, <&osc24M>,
+ <&ccu CLK_PLL_SYSTEM_32K>;
+ clock-names = "bus", "hosc",
+ "pll-32k";
#clock-cells = <1>;
};
r_ccu: clock@7010000 {
compatible = "allwinner,sun50i-h616-r-ccu";
- reg = <0x07010000 0x400>;
- clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
+ reg = <0x07010000 0x210>;
+ clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
<&ccu CLK_PLL_PERIPH0>;
clock-names = "hosc", "losc", "iosc", "pll-periph";
#clock-cells = <1>;
@@ -674,14 +528,13 @@
r_pio: pinctrl@7022000 {
compatible = "allwinner,sun50i-h616-r-pinctrl";
reg = <0x07022000 0x400>;
- interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>;
+ clocks = <&r_ccu CLK_R_APB1>, <&osc24M>,
+ <&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
- interrupt-controller;
- #interrupt-cells = <3>;
+ /omit-if-no-ref/
r_i2c_pins: r-i2c-pins {
pins = "PL0", "PL1";
function = "s_i2c";
@@ -694,21 +547,22 @@
};
ir: ir@7040000 {
- compatible = "allwinner,sun50i-h616-ir",
- "allwinner,sun6i-a31-ir";
- reg = <0x07040000 0x400>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&r_ccu CLK_R_APB1_IR>,
- <&r_ccu CLK_IR>;
- clock-names = "apb", "ir";
- resets = <&r_ccu RST_R_APB1_IR>;
- pinctrl-names = "default";
- pinctrl-0 = <&ir_rx_pin>;
- status = "disabled";
+ compatible = "allwinner,sun50i-h616-ir",
+ "allwinner,sun6i-a31-ir";
+ reg = <0x07040000 0x400>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_R_APB1_IR>,
+ <&r_ccu CLK_IR>;
+ clock-names = "apb", "ir";
+ resets = <&r_ccu RST_R_APB1_IR>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_rx_pin>;
+ status = "disabled";
};
r_i2c: i2c@7081400 {
compatible = "allwinner,sun50i-h616-i2c",
+ "allwinner,sun8i-v536-i2c",
"allwinner,sun6i-a31-i2c";
reg = <0x07081400 0x400>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/dts/sun5i-a13-licheepi-one.dts b/arch/arm/dts/sun5i-a13-licheepi-one.dts
index 2ce361f..3a6c4bd 100644
--- a/arch/arm/dts/sun5i-a13-licheepi-one.dts
+++ b/arch/arm/dts/sun5i-a13-licheepi-one.dts
@@ -67,18 +67,18 @@
compatible = "gpio-leds";
led-0 {
- label ="licheepi:red:usr";
+ label = "licheepi:red:usr";
gpios = <&pio 2 5 GPIO_ACTIVE_LOW>;
};
led-1 {
- label ="licheepi:green:usr";
+ label = "licheepi:green:usr";
gpios = <&pio 2 19 GPIO_ACTIVE_LOW>;
default-state = "on";
};
led-2 {
- label ="licheepi:blue:usr";
+ label = "licheepi:blue:usr";
gpios = <&pio 2 4 GPIO_ACTIVE_LOW>;
};
diff --git a/arch/arm/dts/sun6i-a31.dtsi b/arch/arm/dts/sun6i-a31.dtsi
index d7d920e..f6701ec 100644
--- a/arch/arm/dts/sun6i-a31.dtsi
+++ b/arch/arm/dts/sun6i-a31.dtsi
@@ -46,6 +46,7 @@
#include <dt-bindings/thermal/thermal.h>
#include <dt-bindings/clock/sun6i-a31-ccu.h>
+#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/reset/sun6i-a31-ccu.h>
/ {
@@ -598,7 +599,7 @@
ccu: clock@1c20000 {
compatible = "allwinner,sun6i-a31-ccu";
reg = <0x01c20000 0x400>;
- clocks = <&osc24M>, <&rtc 0>;
+ clocks = <&osc24M>, <&rtc CLK_OSC32K>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
@@ -611,7 +612,8 @@
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&rtc 0>;
+ clocks = <&ccu CLK_APB1_PIO>, <&osc24M>,
+ <&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
@@ -1316,7 +1318,7 @@
ar100: ar100_clk {
compatible = "allwinner,sun6i-a31-ar100-clk";
#clock-cells = <0>;
- clocks = <&rtc 0>, <&osc24M>,
+ clocks = <&rtc CLK_OSC32K>, <&osc24M>,
<&ccu CLK_PLL_PERIPH>,
<&ccu CLK_PLL_PERIPH>;
clock-output-names = "ar100";
@@ -1351,7 +1353,7 @@
ir_clk: ir_clk {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-mod0-clk";
- clocks = <&rtc 0>, <&osc24M>;
+ clocks = <&rtc CLK_OSC32K>, <&osc24M>;
clock-output-names = "ir";
};
@@ -1381,9 +1383,8 @@
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
+ clocks = <&apb0_gates 0>, <&osc24M>, <&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
- resets = <&apb0_rst 0>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
diff --git a/arch/arm/dts/sun7i-a20-pcduino3.dts b/arch/arm/dts/sun7i-a20-pcduino3.dts
index 4f8d55d..928b86a 100644
--- a/arch/arm/dts/sun7i-a20-pcduino3.dts
+++ b/arch/arm/dts/sun7i-a20-pcduino3.dts
@@ -78,19 +78,19 @@
gpio-keys {
compatible = "gpio-keys";
- back {
+ key-back {
label = "Key Back";
linux,code = <KEY_BACK>;
gpios = <&pio 7 17 GPIO_ACTIVE_LOW>;
};
- home {
+ key-home {
label = "Key Home";
linux,code = <KEY_HOME>;
gpios = <&pio 7 18 GPIO_ACTIVE_LOW>;
};
- menu {
+ key-menu {
label = "Key Menu";
linux,code = <KEY_MENU>;
gpios = <&pio 7 19 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi
index a42fac6..06809c3 100644
--- a/arch/arm/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/dts/sun8i-a23-a33.dtsi
@@ -44,6 +44,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
#include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
@@ -329,7 +330,7 @@
ccu: clock@1c20000 {
reg = <0x01c20000 0x400>;
- clocks = <&osc24M>, <&rtc 0>;
+ clocks = <&osc24M>, <&rtc CLK_OSC32K>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
@@ -339,7 +340,8 @@
/* compatible gets set in SoC specific dtsi file */
reg = <0x01c20800 0x400>;
/* interrupts get set in SoC specific dtsi file */
- clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
+ <&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
@@ -806,9 +808,8 @@
compatible = "allwinner,sun8i-a23-r-pinctrl";
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
+ clocks = <&apb0_gates 0>, <&osc24M>, <&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
- resets = <&apb0_rst 0>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
diff --git a/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts b/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts
deleted file mode 100644
index 51097c7..0000000
--- a/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This file is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/dts-v1/;
-#include "sun8i-a23.dtsi"
-#include "sun8i-q8-common.dtsi"
-
-/ {
- model = "Q8 A23 Tablet";
- compatible = "allwinner,q8-a23", "allwinner,sun8i-a23";
-};
-
-&codec {
- allwinner,pa-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
- allwinner,audio-routing =
- "Headphone", "HP",
- "Headphone", "HPCOM",
- "Speaker", "HP",
- "MIC1", "Mic",
- "MIC2", "Headset Mic",
- "Mic", "MBIAS",
- "Headset Mic", "HBIAS";
- status = "okay";
-};
-
-&panel {
- compatible = "bananapi,s070wv20-ct16";
-};
-
-&tcon0_out {
- tcon0_out_lcd: endpoint {
- remote-endpoint = <&panel_input>;
- };
-};
diff --git a/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts b/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts
new file mode 120000
index 0000000..c2f22fc
--- /dev/null
+++ b/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts
@@ -0,0 +1 @@
+sun8i-a23-q8-tablet.dts
\ No newline at end of file
diff --git a/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts
deleted file mode 100644
index 51097c7..0000000
--- a/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This file is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/dts-v1/;
-#include "sun8i-a23.dtsi"
-#include "sun8i-q8-common.dtsi"
-
-/ {
- model = "Q8 A23 Tablet";
- compatible = "allwinner,q8-a23", "allwinner,sun8i-a23";
-};
-
-&codec {
- allwinner,pa-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
- allwinner,audio-routing =
- "Headphone", "HP",
- "Headphone", "HPCOM",
- "Speaker", "HP",
- "MIC1", "Mic",
- "MIC2", "Headset Mic",
- "Mic", "MBIAS",
- "Headset Mic", "HBIAS";
- status = "okay";
-};
-
-&panel {
- compatible = "bananapi,s070wv20-ct16";
-};
-
-&tcon0_out {
- tcon0_out_lcd: endpoint {
- remote-endpoint = <&panel_input>;
- };
-};
diff --git a/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts
new file mode 120000
index 0000000..c2f22fc
--- /dev/null
+++ b/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts
@@ -0,0 +1 @@
+sun8i-a23-q8-tablet.dts
\ No newline at end of file
diff --git a/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts b/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts
deleted file mode 100644
index 9c5750c..0000000
--- a/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This file is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/dts-v1/;
-#include "sun8i-a33.dtsi"
-#include "sun8i-q8-common.dtsi"
-
-/ {
- model = "Q8 A33 Tablet";
- compatible = "allwinner,q8-a33", "allwinner,sun8i-a33";
-};
-
-&tcon0_out {
- tcon0_out_lcd: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&panel_input>;
- };
-};
diff --git a/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts b/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts
new file mode 120000
index 0000000..4519fd7
--- /dev/null
+++ b/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts
@@ -0,0 +1 @@
+sun8i-a33-q8-tablet.dts
\ No newline at end of file
diff --git a/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts b/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts
deleted file mode 100644
index 9c5750c..0000000
--- a/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This file is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/dts-v1/;
-#include "sun8i-a33.dtsi"
-#include "sun8i-q8-common.dtsi"
-
-/ {
- model = "Q8 A33 Tablet";
- compatible = "allwinner,q8-a33", "allwinner,sun8i-a33";
-};
-
-&tcon0_out {
- tcon0_out_lcd: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&panel_input>;
- };
-};
diff --git a/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts b/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts
new file mode 120000
index 0000000..4519fd7
--- /dev/null
+++ b/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts
@@ -0,0 +1 @@
+sun8i-a33-q8-tablet.dts
\ No newline at end of file
diff --git a/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts
index d5c7b79..d729b7c 100644
--- a/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts
+++ b/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts
@@ -47,10 +47,10 @@
};
};
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- sw4 {
+ switch-4 {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
@@ -106,7 +106,7 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
};
};
@@ -181,7 +181,7 @@
bluetooth {
compatible = "brcm,bcm43438-bt";
max-speed = <1500000>;
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "lpo";
vbat-supply = <®_vcc3v3>;
vddio-supply = <®_vcc3v3>;
diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
index f19ed98..3706216 100644
--- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -169,7 +169,7 @@
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "mxicy,mx25l1606e", "winbond,w25q128";
+ compatible = "mxicy,mx25l1606e", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
};
diff --git a/arch/arm/dts/sun8i-h3-beelink-x2.dts b/arch/arm/dts/sun8i-h3-beelink-x2.dts
index cd9f655..27a0d51 100644
--- a/arch/arm/dts/sun8i-h3-beelink-x2.dts
+++ b/arch/arm/dts/sun8i-h3-beelink-x2.dts
@@ -93,10 +93,10 @@
};
};
- r-gpio-keys {
+ gpio-keys {
compatible = "gpio-keys";
- power {
+ key-power {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
@@ -125,7 +125,7 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
};
};
diff --git a/arch/arm/dts/sun8i-h3-mapleboard-mp130.dts b/arch/arm/dts/sun8i-h3-mapleboard-mp130.dts
index ff0a7a9..f5c8ccc 100644
--- a/arch/arm/dts/sun8i-h3-mapleboard-mp130.dts
+++ b/arch/arm/dts/sun8i-h3-mapleboard-mp130.dts
@@ -39,16 +39,16 @@
};
};
- r_gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- power {
+ key-power {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */
};
- user {
+ key-user {
label = "user";
linux,code = <BTN_0>;
gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/dts/sun8i-h3-nanopi-duo2.dts
index 8e7dfcf..43641cb 100644
--- a/arch/arm/dts/sun8i-h3-nanopi-duo2.dts
+++ b/arch/arm/dts/sun8i-h3-nanopi-duo2.dts
@@ -37,10 +37,10 @@
};
};
- r_gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- k1 {
+ key-0 {
label = "k1";
linux,code = <BTN_0>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */
@@ -90,7 +90,7 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
};
@@ -151,7 +151,7 @@
bluetooth {
compatible = "brcm,bcm43438-bt";
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "lpo";
vbat-supply = <®_vcc3v3>;
vddio-supply = <®_vcc3v3>;
diff --git a/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts
index cd3df12..9e1a33f 100644
--- a/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts
+++ b/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts
@@ -127,7 +127,7 @@
bluetooth {
compatible = "brcm,bcm43438-bt";
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "lpo";
vbat-supply = <®_vcc3v3>;
vddio-supply = <®_vcc3v3>;
diff --git a/arch/arm/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
index 26e2e61..42cd113 100644
--- a/arch/arm/dts/sun8i-h3-nanopi-r1.dts
+++ b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
@@ -46,7 +46,7 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
};
@@ -147,7 +147,7 @@
bluetooth {
compatible = "brcm,bcm43438-bt";
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "lpo";
vbat-supply = <®_vcc3v3>;
vddio-supply = <®_vcc3v3>;
diff --git a/arch/arm/dts/sun8i-h3-nanopi.dtsi b/arch/arm/dts/sun8i-h3-nanopi.dtsi
index fc45d5a..cf8413f 100644
--- a/arch/arm/dts/sun8i-h3-nanopi.dtsi
+++ b/arch/arm/dts/sun8i-h3-nanopi.dtsi
@@ -73,11 +73,10 @@
};
};
- r_gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- input-name = "k1";
- k1 {
+ key-0 {
label = "k1";
linux,code = <KEY_POWER>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/dts/sun8i-h3-orangepi-2.dts b/arch/arm/dts/sun8i-h3-orangepi-2.dts
index 9daffd9..f1f9dbe 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-2.dts
@@ -88,16 +88,16 @@
};
};
- r_gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- sw2 {
+ switch-2 {
label = "sw2";
linux,code = <BTN_1>;
gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>;
};
- sw4 {
+ switch-4 {
label = "sw4";
linux,code = <KEY_POWER>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/dts/sun8i-h3-orangepi-lite.dts b/arch/arm/dts/sun8i-h3-orangepi-lite.dts
index 6f9c97a..305b34a 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-lite.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-lite.dts
@@ -87,10 +87,10 @@
};
};
- r_gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- sw4 {
+ switch-4 {
label = "sw4";
linux,code = <BTN_0>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/dts/sun8i-h3-orangepi-one.dts b/arch/arm/dts/sun8i-h3-orangepi-one.dts
index 4759ba3..59f6f6d 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-one.dts
@@ -86,10 +86,10 @@
};
};
- r_gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- sw4 {
+ switch-4 {
label = "sw4";
linux,code = <BTN_0>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/dts/sun8i-h3-orangepi-pc.dts
index 90f75fa..b96e015 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-pc.dts
@@ -86,10 +86,10 @@
};
};
- r_gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- sw4 {
+ switch-4 {
label = "sw4";
linux,code = <KEY_POWER>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/dts/sun8i-r16-bananapi-m2m.dts b/arch/arm/dts/sun8i-r16-bananapi-m2m.dts
index 293016d..f97218e 100644
--- a/arch/arm/dts/sun8i-r16-bananapi-m2m.dts
+++ b/arch/arm/dts/sun8i-r16-bananapi-m2m.dts
@@ -91,7 +91,7 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
};
};
@@ -283,7 +283,7 @@
bluetooth {
compatible = "brcm,bcm43438-bt";
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "lpo";
vbat-supply = <®_dldo1>;
vddio-supply = <®_aldo3>;
diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
index a6a1087..28197bb 100644
--- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -43,6 +43,7 @@
/dts-v1/;
#include "sun8i-r40.dtsi"
+#include "sun8i-r40-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
@@ -113,6 +114,10 @@
status = "okay";
};
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
&de {
status = "okay";
};
diff --git a/arch/arm/dts/sun8i-r40-cpu-opp.dtsi b/arch/arm/dts/sun8i-r40-cpu-opp.dtsi
new file mode 100644
index 0000000..649928b
--- /dev/null
+++ b/arch/arm/dts/sun8i-r40-cpu-opp.dtsi
@@ -0,0 +1,52 @@
+/{
+ cpu0_opp_table: opp-table-cpu {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-720000000 {
+ opp-hz = /bits/ 64 <720000000>;
+ opp-microvolt = <1000000 1000000 1300000>;
+ clock-latency-ns = <2000000>;
+ };
+
+ opp-912000000 {
+ opp-hz = /bits/ 64 <912000000>;
+ opp-microvolt = <1100000 1100000 1300000>;
+ clock-latency-ns = <2000000>;
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1160000 1160000 1300000>;
+ clock-latency-ns = <2000000>;
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1240000 1240000 1300000>;
+ clock-latency-ns = <2000000>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <2000000>;
+ };
+ };
+};
+
+&cpu0 {
+ operating-points-v2 = <&cpu0_opp_table>;
+};
+
+&cpu1 {
+ operating-points-v2 = <&cpu0_opp_table>;
+};
+
+&cpu2 {
+ operating-points-v2 = <&cpu0_opp_table>;
+};
+
+&cpu3 {
+ operating-points-v2 = <&cpu0_opp_table>;
+};
diff --git a/arch/arm/dts/sun8i-r40-feta40i.dtsi b/arch/arm/dts/sun8i-r40-feta40i.dtsi
index 265e0fa..9f39b5a 100644
--- a/arch/arm/dts/sun8i-r40-feta40i.dtsi
+++ b/arch/arm/dts/sun8i-r40-feta40i.dtsi
@@ -5,6 +5,11 @@
// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
#include "sun8i-r40.dtsi"
+#include "sun8i-r40-cpu-opp.dtsi"
+
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
&i2c0 {
status = "okay";
diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
index 03d3e5f..4ef26d8 100644
--- a/arch/arm/dts/sun8i-r40.dtsi
+++ b/arch/arm/dts/sun8i-r40.dtsi
@@ -42,6 +42,7 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-r40-ccu.h>
#include <dt-bindings/clock/sun8i-tcon-top.h>
@@ -84,24 +85,36 @@
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0>;
+ clocks = <&ccu CLK_CPU>;
+ clock-names = "cpu";
+ #cooling-cells = <2>;
};
cpu1: cpu@1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <1>;
+ clocks = <&ccu CLK_CPU>;
+ clock-names = "cpu";
+ #cooling-cells = <2>;
};
cpu2: cpu@2 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <2>;
+ clocks = <&ccu CLK_CPU>;
+ clock-names = "cpu";
+ #cooling-cells = <2>;
};
cpu3: cpu@3 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <3>;
+ clocks = <&ccu CLK_CPU>;
+ clock-names = "cpu";
+ #cooling-cells = <2>;
};
};
@@ -117,6 +130,30 @@
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
+
+ trips {
+ cpu_hot_trip: cpu-hot {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot_trip: cpu-very-hot {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpu-hot-limit {
+ trip = <&cpu_hot_trip>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
gpu_thermal: gpu-thermal {
@@ -485,7 +522,7 @@
ccu: clock@1c20000 {
compatible = "allwinner,sun8i-r40-ccu";
reg = <0x01c20000 0x400>;
- clocks = <&osc24M>, <&rtc 0>;
+ clocks = <&osc24M>, <&rtc CLK_OSC32K>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
@@ -504,7 +541,8 @@
compatible = "allwinner,sun8i-r40-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
+ <&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
@@ -1231,7 +1269,7 @@
reg-io-width = <1>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>,
- <&ccu CLK_HDMI>, <&rtc 0>;
+ <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>;
clock-names = "iahb", "isfr", "tmds", "cec";
resets = <&ccu RST_BUS_HDMI1>;
reset-names = "ctrl";
diff --git a/arch/arm/dts/sun8i-t3-cqa3t-bv3.dts b/arch/arm/dts/sun8i-t3-cqa3t-bv3.dts
index 6931aaa..9f47252 100644
--- a/arch/arm/dts/sun8i-t3-cqa3t-bv3.dts
+++ b/arch/arm/dts/sun8i-t3-cqa3t-bv3.dts
@@ -45,6 +45,7 @@
/dts-v1/;
#include "sun8i-r40.dtsi"
+#include "sun8i-r40-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
@@ -88,6 +89,10 @@
status = "okay";
};
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
&de {
status = "okay";
};
diff --git a/arch/arm/dts/sun8i-v3s.dtsi b/arch/arm/dts/sun8i-v3s.dtsi
index 084323d..db194c6 100644
--- a/arch/arm/dts/sun8i-v3s.dtsi
+++ b/arch/arm/dts/sun8i-v3s.dtsi
@@ -42,6 +42,7 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/clock/sun8i-v3s-ccu.h>
#include <dt-bindings/reset/sun8i-v3s-ccu.h>
#include <dt-bindings/clock/sun8i-de2.h>
@@ -321,7 +322,7 @@
ccu: clock@1c20000 {
compatible = "allwinner,sun8i-v3s-ccu";
reg = <0x01c20000 0x400>;
- clocks = <&osc24M>, <&rtc 0>;
+ clocks = <&osc24M>, <&rtc CLK_OSC32K>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
@@ -342,7 +343,8 @@
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
+ <&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
index 4795455..4348710 100644
--- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
+++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
@@ -42,6 +42,7 @@
/dts-v1/;
#include "sun8i-r40.dtsi"
+#include "sun8i-r40-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
@@ -107,6 +108,10 @@
status = "okay";
};
+&cpu0 {
+ cpu-supply = <®_dcdc2>;
+};
+
&de {
status = "okay";
};
diff --git a/arch/arm/dts/sun9i-a80.dtsi b/arch/arm/dts/sun9i-a80.dtsi
index ce4fa67..7d3f330 100644
--- a/arch/arm/dts/sun9i-a80.dtsi
+++ b/arch/arm/dts/sun9i-a80.dtsi
@@ -1218,7 +1218,6 @@
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apbs_gates 0>, <&osc24M>, <&osc32k>;
clock-names = "apb", "hosc", "losc";
- resets = <&apbs_rst 0>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
diff --git a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi
index d03f585..e899d14 100644
--- a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi
+++ b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi
@@ -77,10 +77,10 @@
};
};
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- sw4 {
+ switch-4 {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
@@ -101,7 +101,7 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
};
};
@@ -221,7 +221,7 @@
bluetooth {
compatible = "brcm,bcm43438-bt";
max-speed = <1500000>;
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "lpo";
vbat-supply = <®_vcc3v3>;
vddio-supply = <®_vcc3v3>;
diff --git a/arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi b/arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi
index fc67e30..60804b0 100644
--- a/arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi
+++ b/arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi
@@ -22,7 +22,7 @@
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */
post-power-on-delay-ms = <200>;
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
};
};
@@ -124,7 +124,7 @@
bluetooth {
compatible = "brcm,bcm43438-bt";
- clocks = <&rtc 1>;
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "lpo";
vbat-supply = <®_vcc3v3>;
vddio-supply = <®_vcc3v3>;
diff --git a/arch/arm/dts/sunxi-h3-h5.dtsi b/arch/arm/dts/sunxi-h3-h5.dtsi
index 6cea57e..6439141 100644
--- a/arch/arm/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/dts/sunxi-h3-h5.dtsi
@@ -40,6 +40,7 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
+#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-h3-ccu.h>
#include <dt-bindings/clock/sun8i-r-ccu.h>
@@ -386,7 +387,7 @@
ccu: clock@1c20000 {
/* compatible is in per SoC .dtsi file */
reg = <0x01c20000 0x400>;
- clocks = <&osc24M>, <&rtc 0>;
+ clocks = <&osc24M>, <&rtc CLK_OSC32K>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
@@ -397,7 +398,8 @@
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
+ <&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
@@ -817,7 +819,7 @@
reg-io-width = <1>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
- <&ccu CLK_HDMI>, <&rtc 0>;
+ <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>;
clock-names = "iahb", "isfr", "tmds", "cec";
resets = <&ccu RST_BUS_HDMI1>;
reset-names = "ctrl";
@@ -876,7 +878,7 @@
r_ccu: clock@1f01400 {
compatible = "allwinner,sun8i-h3-r-ccu";
reg = <0x01f01400 0x100>;
- clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
+ clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
<&ccu CLK_PLL_PERIPH0>;
clock-names = "hosc", "losc", "iosc", "pll-periph";
#clock-cells = <1>;
@@ -928,7 +930,8 @@
compatible = "allwinner,sun8i-h3-r-pinctrl";
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>;
+ clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>,
+ <&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
diff --git a/arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi b/arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi
index 9e14fe5..89731bb 100644
--- a/arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi
+++ b/arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi
@@ -42,10 +42,10 @@
};
};
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- power {
+ key-power {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 5712576..fc5d8bb 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -185,6 +185,8 @@
select CPU_ARM926EJS
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
+ select SKIP_LOWLEVEL_INIT_ONLY
+ select SPL_SKIP_LOWLEVEL_INIT_ONLY
config MACH_SUN4I
bool "sun4i (Allwinner A10)"
@@ -615,6 +617,18 @@
config SYS_SOC
default "sunxi"
+config SUNXI_MINIMUM_DRAM_MB
+ int "minimum DRAM size"
+ default 32 if MACH_SUNIV
+ default 64 if MACH_SUN8I_V3S
+ default 256
+ ---help---
+ Minimum DRAM size expected on the board. Traditionally we assumed
+ 256 MB, so that U-Boot would load at 160MB. With co-packaged DRAM
+ we have smaller sizes, though, so that U-Boot's own load address and
+ the default payload addresses must be shifted down.
+ This is expected to be fixed by the SoC selection.
+
config UART0_PORT_F
bool "UART0 on MicroSD breakout board"
---help---
@@ -998,7 +1012,7 @@
config SPL_SPI_SUNXI
bool "Support for SPI Flash on Allwinner SoCs in SPL"
- depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || MACH_SUN50I_H6 || MACH_SUNIV
+ depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || SUN50I_GEN_H6 || MACH_SUNIV
help
Enable support for SPI Flash. This option allows SPL to read from
sunxi SPI Flash. It uses the same method as the boot ROM, so does
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 62bb40b..220ed80 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -147,6 +147,10 @@
sunxi_gpio_set_cfgpin(SUNXI_GPH(12), SUN9I_GPH_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPH(13), SUN9I_GPH_UART0);
sunxi_gpio_set_pull(SUNXI_GPH(13), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUNIV)
+ sunxi_gpio_set_cfgpin(SUNXI_GPA(2), SUNIV_GPE_UART0);
+ sunxi_gpio_set_cfgpin(SUNXI_GPA(3), SUNIV_GPE_UART0);
+ sunxi_gpio_set_pull(SUNXI_GPA(3), SUNXI_GPIO_PULL_UP);
#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
@@ -488,7 +492,7 @@
}
#endif
-#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && !defined(CONFIG_ARM64)
+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && defined(CONFIG_CPU_V7A)
void enable_caches(void)
{
/* Enable D-cache. I-cache is already enabled in start.S */
diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c
index 925bf85..520f14e 100644
--- a/arch/arm/mach-sunxi/spl_spi_sunxi.c
+++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c
@@ -78,7 +78,7 @@
#define CCM_AHB_GATING0 (0x01C20000 + 0x60)
#define CCM_H6_SPI_BGR_REG (0x03001000 + 0x96c)
-#ifdef CONFIG_MACH_SUN50I_H6
+#ifdef CONFIG_SUN50I_GEN_H6
#define CCM_SPI0_CLK (0x03001000 + 0x940)
#else
#define CCM_SPI0_CLK (0x01C20000 + 0xA0)
@@ -97,7 +97,7 @@
/*
* Allwinner A10/A20 SoCs were using pins PC0,PC1,PC2,PC23 for booting
* from SPI Flash, everything else is using pins PC0,PC1,PC2,PC3.
- * The H6 uses PC0, PC2, PC3, PC5.
+ * The H6 uses PC0, PC2, PC3, PC5, the H616 PC0, PC2, PC3, PC4.
*/
static void spi0_pinmux_setup(unsigned int pin_function)
{
@@ -105,11 +105,14 @@
sunxi_gpio_set_cfgpin(SUNXI_GPC(0), pin_function);
sunxi_gpio_set_cfgpin(SUNXI_GPC(2), pin_function);
- /* All chips except H6 use PC1, and only H6 uses PC5. */
- if (!IS_ENABLED(CONFIG_MACH_SUN50I_H6))
+ /* All chips except H6 and H616 use PC1. */
+ if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6))
sunxi_gpio_set_cfgpin(SUNXI_GPC(1), pin_function);
- else
+
+ if (IS_ENABLED(CONFIG_MACH_SUN50I_H6))
sunxi_gpio_set_cfgpin(SUNXI_GPC(5), pin_function);
+ if (IS_ENABLED(CONFIG_MACH_SUN50I_H616))
+ sunxi_gpio_set_cfgpin(SUNXI_GPC(4), pin_function);
/* Older generations use PC23 for CS, newer ones use PC3. */
if (IS_ENABLED(CONFIG_MACH_SUN4I) || IS_ENABLED(CONFIG_MACH_SUN7I) ||
@@ -122,7 +125,7 @@
static bool is_sun6i_gen_spi(void)
{
return IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I) ||
- IS_ENABLED(CONFIG_MACH_SUN50I_H6);
+ IS_ENABLED(CONFIG_SUN50I_GEN_H6);
}
static uintptr_t spi0_base_address(void)
@@ -130,7 +133,7 @@
if (IS_ENABLED(CONFIG_MACH_SUN8I_R40))
return 0x01C05000;
- if (IS_ENABLED(CONFIG_MACH_SUN50I_H6))
+ if (IS_ENABLED(CONFIG_SUN50I_GEN_H6))
return 0x05010000;
if (!is_sun6i_gen_spi() ||
@@ -148,14 +151,14 @@
uintptr_t base = spi0_base_address();
/* Deassert SPI0 reset on SUN6I */
- if (IS_ENABLED(CONFIG_MACH_SUN50I_H6))
+ if (IS_ENABLED(CONFIG_SUN50I_GEN_H6))
setbits_le32(CCM_H6_SPI_BGR_REG, (1U << 16) | 0x1);
else if (is_sun6i_gen_spi())
setbits_le32(SUN6I_BUS_SOFT_RST_REG0,
(1 << AHB_RESET_SPI0_SHIFT));
/* Open the SPI0 gate */
- if (!IS_ENABLED(CONFIG_MACH_SUN50I_H6))
+ if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6))
setbits_le32(CCM_AHB_GATING0, (1 << AHB_GATE_OFFSET_SPI0));
if (IS_ENABLED(CONFIG_MACH_SUNIV)) {
@@ -202,11 +205,11 @@
writel(0, CCM_SPI0_CLK);
/* Close the SPI0 gate */
- if (!IS_ENABLED(CONFIG_MACH_SUN50I_H6))
+ if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6))
clrbits_le32(CCM_AHB_GATING0, (1 << AHB_GATE_OFFSET_SPI0));
/* Assert SPI0 reset on SUN6I */
- if (IS_ENABLED(CONFIG_MACH_SUN50I_H6))
+ if (IS_ENABLED(CONFIG_SUN50I_GEN_H6))
clrbits_le32(CCM_H6_SPI_BGR_REG, (1U << 16) | 0x1);
else if (is_sun6i_gen_spi())
clrbits_le32(SUN6I_BUS_SOFT_RST_REG0,
@@ -218,7 +221,7 @@
unsigned int pin_function = SUNXI_GPC_SPI0;
if (IS_ENABLED(CONFIG_MACH_SUN50I) ||
- IS_ENABLED(CONFIG_MACH_SUN50I_H6))
+ IS_ENABLED(CONFIG_SUN50I_GEN_H6))
pin_function = SUN50I_GPC_SPI0;
else if (IS_ENABLED(CONFIG_MACH_SUNIV))
pin_function = SUNIV_GPC_SPI0;
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 5a0b598..80e3f4b 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -535,6 +535,11 @@
S: Maintained
F: configs/Wexler_TAB7200_defconfig
+X96 MATE TV BOX
+M: Andre Przywara <andre.przywara@arm.com>
+S: Maintained
+F: configs/x96_mate_defconfig
+
YONES TOPTECH BD1078 BOARD
M: Paul Kocialkowski <contact@paulk.fr>
S: Maintained
diff --git a/boot/Kconfig b/boot/Kconfig
index 6b3b8f0..45f86e9 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -499,8 +499,8 @@
default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3
default 0x81700000 if MACH_SUNIV
default 0x2a000000 if MACH_SUN9I
- default 0x42e00000 if MACH_SUN8I_V3S
- default 0x4a000000 if ARCH_SUNXI
+ default 0x4a000000 if SUNXI_MINIMUM_DRAM_MB >= 256
+ default 0x42e00000 if SUNXI_MINIMUM_DRAM_MB >= 64
hex "Text Base"
help
The address in memory that U-Boot will be running from, initially.
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 49247a4..16030e3 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -86,6 +86,7 @@
config SYS_PBSIZE
int "Buffer size for console output"
+ default 1024 if ARCH_SUNXI
default 1044
config SYS_XTRACE
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index f2422d2..b1b9e09 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -81,6 +81,7 @@
default 0x10000 if ARCH_MX6 && !MX6_OCRAM_256KB
default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x10000
default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x20000 && !MACH_SUN50I_H616
+ default 0xbfa0 if MACH_SUN50I_H616
default 0x7000 if RCAR_GEN3
default 0x5fa0 if SUNXI_SRAM_ADDRESS = 0x0
default 0x10000 if ASPEED_AST2600
@@ -353,6 +354,11 @@
default 0x946bb8 if ARCH_MX7
default 0x93ffb8 if ARCH_MX6 && MX6_OCRAM_256KB
default 0x91ffb8 if ARCH_MX6 && !MX6_OCRAM_256KB
+ default 0x118000 if MACH_SUN50I_H6
+ default 0x58000 if MACH_SUN50I_H616
+ default 0x54000 if MACH_SUN50I || MACH_SUN50I_H5
+ default 0x18000 if MACH_SUN9I
+ default 0x8000 if ARCH_SUNXI
help
Address of the start of the stack SPL will use before SDRAM is
initialized.
diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig
index 26a9212..6727932 100644
--- a/configs/A10-OLinuXino-Lime_defconfig
+++ b/configs/A10-OLinuXino-Lime_defconfig
@@ -11,9 +11,7 @@
CONFIG_SATAPWR="PC3"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig
index 7e9b92e..99f5785 100644
--- a/configs/A10s-OLinuXino-M_defconfig
+++ b/configs/A10s-OLinuXino-M_defconfig
@@ -9,9 +9,7 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=1
CONFIG_USB1_VBUS_PIN="PB10"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig
index 625a331..f9d17b1 100644
--- a/configs/A13-OLinuXinoM_defconfig
+++ b/configs/A13-OLinuXinoM_defconfig
@@ -13,8 +13,6 @@
CONFIG_VIDEO_LCD_POWER="PB10"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig
index 5e0396c..8c90435 100644
--- a/configs/A13-OLinuXino_defconfig
+++ b/configs/A13-OLinuXino_defconfig
@@ -15,9 +15,7 @@
CONFIG_VIDEO_LCD_POWER="AXP0-0"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_DFU_RAM=y
diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
index b580281..bccadcc 100644
--- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig
+++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
@@ -13,9 +13,7 @@
CONFIG_SPL_SPI_SUNXI=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SCSI_AHCI=y
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig
index de4f631..0a9de5e 100644
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -11,9 +11,7 @@
CONFIG_SATAPWR="PC3"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SCSI_AHCI=y
diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig
index ebb3a02..38daf33 100644
--- a/configs/A20-OLinuXino-Lime_defconfig
+++ b/configs/A20-OLinuXino-Lime_defconfig
@@ -9,9 +9,7 @@
CONFIG_SATAPWR="PC3"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig
index c880243..d73e64c 100644
--- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig
+++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig
@@ -11,9 +11,7 @@
CONFIG_SATAPWR="PB8"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig
index f449641..8a6bb88 100644
--- a/configs/A20-OLinuXino_MICRO_defconfig
+++ b/configs/A20-OLinuXino_MICRO_defconfig
@@ -12,9 +12,7 @@
CONFIG_SATAPWR="PB8"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig
index 67b47f5..5de6c2d 100644
--- a/configs/A20-Olimex-SOM-EVB_defconfig
+++ b/configs/A20-Olimex-SOM-EVB_defconfig
@@ -12,9 +12,7 @@
CONFIG_SATAPWR="PC3"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
index e02d67d..6e9bdc2 100644
--- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
+++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
@@ -13,9 +13,7 @@
CONFIG_GMAC_TX_DELAY=4
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig
index 317a1e6..e051745 100644
--- a/configs/A20-Olimex-SOM204-EVB_defconfig
+++ b/configs/A20-Olimex-SOM204-EVB_defconfig
@@ -12,9 +12,7 @@
CONFIG_GMAC_TX_DELAY=4
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
diff --git a/configs/A33-OLinuXino_defconfig b/configs/A33-OLinuXino_defconfig
index c9eec1f..351a454 100644
--- a/configs/A33-OLinuXino_defconfig
+++ b/configs/A33-OLinuXino_defconfig
@@ -16,7 +16,5 @@
CONFIG_VIDEO_LCD_BL_EN="PB2"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DCDC1_VOLT=3300
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Ainol_AW1_defconfig b/configs/Ainol_AW1_defconfig
index 8cd38f7..9a18af8 100644
--- a/configs/Ainol_AW1_defconfig
+++ b/configs/Ainol_AW1_defconfig
@@ -14,9 +14,7 @@
CONFIG_VIDEO_LCD_BL_EN="PH7"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig
index 68707ed..7bf3dfc 100644
--- a/configs/Ampe_A76_defconfig
+++ b/configs/Ampe_A76_defconfig
@@ -15,9 +15,7 @@
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Auxtek-T003_defconfig b/configs/Auxtek-T003_defconfig
index 703df18..7d81f12 100644
--- a/configs/Auxtek-T003_defconfig
+++ b/configs/Auxtek-T003_defconfig
@@ -8,9 +8,7 @@
CONFIG_USB1_VBUS_PIN="PB10"
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig
index a8d236e..4c7154b 100644
--- a/configs/Auxtek-T004_defconfig
+++ b/configs/Auxtek-T004_defconfig
@@ -6,9 +6,7 @@
CONFIG_DRAM_CLK=432
CONFIG_USB1_VBUS_PIN="PG13"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig
index be5be9a..18ee81b 100644
--- a/configs/Bananapi_M2_Ultra_defconfig
+++ b/configs/Bananapi_M2_Ultra_defconfig
@@ -12,9 +12,7 @@
# CONFIG_HAS_ARMV7_SECURE_BASE is not set
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
index 053ba13..6c2a1f6 100644
--- a/configs/Bananapi_defconfig
+++ b/configs/Bananapi_defconfig
@@ -9,9 +9,7 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_NETCONSOLE=y
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
diff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig
index 6a07f26..bad38a6 100644
--- a/configs/Bananapi_m2m_defconfig
+++ b/configs/Bananapi_m2m_defconfig
@@ -10,8 +10,6 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_USB0_ID_DET="PH8"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig
index 36f9bf8..94fd747 100644
--- a/configs/Bananapro_defconfig
+++ b/configs/Bananapro_defconfig
@@ -11,9 +11,7 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_NETCONSOLE=y
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig
index 40d2c5b..cd9bdbf 100644
--- a/configs/CHIP_defconfig
+++ b/configs/CHIP_defconfig
@@ -7,9 +7,7 @@
CONFIG_USB0_VBUS_PIN="PB10"
CONFIG_VIDEO_COMPOSITE=y
CONFIG_CHIP_DIP_SCAN=y
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_DFU=y
CONFIG_DFU_RAM=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig
index 9016801..2917960 100644
--- a/configs/CHIP_pro_defconfig
+++ b/configs/CHIP_pro_defconfig
@@ -5,9 +5,7 @@
CONFIG_MACH_SUN5I=y
CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
CONFIG_USB0_VBUS_PIN="PB10"
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=sunxi-nand.0"
diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig
index 49be3fc..1cd39d4 100644
--- a/configs/CSQ_CS908_defconfig
+++ b/configs/CSQ_CS908_defconfig
@@ -7,8 +7,6 @@
CONFIG_USB1_VBUS_PIN=""
CONFIG_USB2_VBUS_PIN=""
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig
index b59d178..02b3e69 100644
--- a/configs/Chuwi_V7_CW0825_defconfig
+++ b/configs/Chuwi_V7_CW0825_defconfig
@@ -14,9 +14,7 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_VIDEO_LCD_PANEL_HITACHI_TX18D42VM=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig
index 24b55bf..270bd7d 100644
--- a/configs/Colombus_defconfig
+++ b/configs/Colombus_defconfig
@@ -15,8 +15,6 @@
CONFIG_VIDEO_LCD_BL_PWM="PH13"
CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig
index 315c52f..ab5e53f 100644
--- a/configs/Cubieboard2_defconfig
+++ b/configs/Cubieboard2_defconfig
@@ -8,9 +8,7 @@
CONFIG_SATAPWR="PB8"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/Cubieboard4_defconfig b/configs/Cubieboard4_defconfig
index 928299e..04ed79a 100644
--- a/configs/Cubieboard4_defconfig
+++ b/configs/Cubieboard4_defconfig
@@ -12,7 +12,5 @@
CONFIG_USB1_VBUS_PIN="PH14"
CONFIG_USB3_VBUS_PIN="PH15"
CONFIG_AXP_GPIO=y
-CONFIG_SPL_STACK=0x18000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_SUN8I_RSB=y
CONFIG_AXP809_POWER=y
diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig
index 49eb018..c017b12 100644
--- a/configs/Cubieboard_defconfig
+++ b/configs/Cubieboard_defconfig
@@ -8,9 +8,7 @@
CONFIG_SATAPWR="PB8"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
index 62668df..c85468e 100644
--- a/configs/Cubietruck_defconfig
+++ b/configs/Cubietruck_defconfig
@@ -13,9 +13,7 @@
CONFIG_GMAC_TX_DELAY=1
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SCSI_AHCI=y
diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig
index 8119b8b..13f9589 100644
--- a/configs/Cubietruck_plus_defconfig
+++ b/configs/Cubietruck_plus_defconfig
@@ -16,8 +16,6 @@
CONFIG_AXP_GPIO=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
diff --git a/configs/Empire_electronix_d709_defconfig b/configs/Empire_electronix_d709_defconfig
index 0187b89..a9bbe8b 100644
--- a/configs/Empire_electronix_d709_defconfig
+++ b/configs/Empire_electronix_d709_defconfig
@@ -16,9 +16,7 @@
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig
index 6570b97..fc1f26b 100644
--- a/configs/Empire_electronix_m712_defconfig
+++ b/configs/Empire_electronix_m712_defconfig
@@ -15,9 +15,7 @@
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig
index 3afe4c5..24e8b5b 100644
--- a/configs/Hummingbird_A31_defconfig
+++ b/configs/Hummingbird_A31_defconfig
@@ -9,8 +9,6 @@
CONFIG_VIDEO_VGA_VIA_LCD=y
CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig
index 8bf7d1e..482e0fb 100644
--- a/configs/Hyundai_A7HD_defconfig
+++ b/configs/Hyundai_A7HD_defconfig
@@ -15,9 +15,7 @@
# CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig
index 1a16155..99df9cf 100644
--- a/configs/Itead_Ibox_A20_defconfig
+++ b/configs/Itead_Ibox_A20_defconfig
@@ -8,9 +8,7 @@
CONFIG_SATAPWR="PB8"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig
index 3627e4d..f97dc13 100644
--- a/configs/Lamobo_R1_defconfig
+++ b/configs/Lamobo_R1_defconfig
@@ -10,9 +10,7 @@
CONFIG_GMAC_TX_DELAY=4
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig
index 2e0b0b7..9815348 100644
--- a/configs/LicheePi_Zero_defconfig
+++ b/configs/LicheePi_Zero_defconfig
@@ -5,6 +5,4 @@
CONFIG_MACH_SUN8I_V3S=y
CONFIG_DRAM_CLK=360
# CONFIG_HAS_ARMV7_SECURE_BASE is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
# CONFIG_NETDEVICES is not set
diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig
index 41ed46a..e3e30a4 100644
--- a/configs/Linksprite_pcDuino3_Nano_defconfig
+++ b/configs/Linksprite_pcDuino3_Nano_defconfig
@@ -10,9 +10,7 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig
index 44a3901..1fda0db 100644
--- a/configs/Linksprite_pcDuino3_defconfig
+++ b/configs/Linksprite_pcDuino3_defconfig
@@ -8,9 +8,7 @@
CONFIG_SATAPWR="PH2"
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig
index 2796415..49dcfa0 100644
--- a/configs/Linksprite_pcDuino_defconfig
+++ b/configs/Linksprite_pcDuino_defconfig
@@ -6,9 +6,7 @@
CONFIG_USB1_VBUS_PIN=""
CONFIG_USB2_VBUS_PIN=""
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/MK808C_defconfig b/configs/MK808C_defconfig
index 4e678bd..3ed962d 100644
--- a/configs/MK808C_defconfig
+++ b/configs/MK808C_defconfig
@@ -5,9 +5,7 @@
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=384
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/MSI_Primo73_defconfig b/configs/MSI_Primo73_defconfig
index 7a4b224..071169f 100644
--- a/configs/MSI_Primo73_defconfig
+++ b/configs/MSI_Primo73_defconfig
@@ -10,9 +10,7 @@
CONFIG_VIDEO_LCD_BL_EN="PH7"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/MSI_Primo81_defconfig b/configs/MSI_Primo81_defconfig
index bb820fd..e77b007 100644
--- a/configs/MSI_Primo81_defconfig
+++ b/configs/MSI_Primo81_defconfig
@@ -13,8 +13,6 @@
CONFIG_VIDEO_LCD_BL_PWM="PH13"
CONFIG_VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DLDO1_VOLT=3300
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig
index 1584778..3c5312d 100644
--- a/configs/Marsboard_A10_defconfig
+++ b/configs/Marsboard_A10_defconfig
@@ -5,8 +5,6 @@
CONFIG_MACH_SUN4I=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig
index acd751b..c697d28 100644
--- a/configs/Mele_A1000G_quad_defconfig
+++ b/configs/Mele_A1000G_quad_defconfig
@@ -7,8 +7,6 @@
CONFIG_USB1_VBUS_PIN="PC27"
CONFIG_USB2_VBUS_PIN=""
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig
index eb3e798..f5b6d90 100644
--- a/configs/Mele_A1000_defconfig
+++ b/configs/Mele_A1000_defconfig
@@ -8,9 +8,7 @@
CONFIG_VIDEO_COMPOSITE=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/Mele_I7_defconfig b/configs/Mele_I7_defconfig
index 48dad60..2b9bca1 100644
--- a/configs/Mele_I7_defconfig
+++ b/configs/Mele_I7_defconfig
@@ -7,8 +7,6 @@
CONFIG_USB1_VBUS_PIN="PC27"
CONFIG_USB2_VBUS_PIN=""
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig
index ce96239..77cb464 100644
--- a/configs/Mele_M3_defconfig
+++ b/configs/Mele_M3_defconfig
@@ -9,9 +9,7 @@
CONFIG_VIDEO_VGA=y
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig
index 2e6d5dd..b07dbbd 100644
--- a/configs/Mele_M5_defconfig
+++ b/configs/Mele_M5_defconfig
@@ -9,9 +9,7 @@
CONFIG_VIDEO_COMPOSITE=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig
index b84a2ae..be6dd41 100644
--- a/configs/Mele_M9_defconfig
+++ b/configs/Mele_M9_defconfig
@@ -7,8 +7,6 @@
CONFIG_USB1_VBUS_PIN="PC27"
CONFIG_USB2_VBUS_PIN=""
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/Merrii_A80_Optimus_defconfig b/configs/Merrii_A80_Optimus_defconfig
index 3709a11..c5d1f40 100644
--- a/configs/Merrii_A80_Optimus_defconfig
+++ b/configs/Merrii_A80_Optimus_defconfig
@@ -12,7 +12,5 @@
CONFIG_USB1_VBUS_PIN="PH4"
CONFIG_USB3_VBUS_PIN="PH5"
CONFIG_AXP_GPIO=y
-CONFIG_SPL_STACK=0x18000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_SUN8I_RSB=y
CONFIG_AXP809_POWER=y
diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig
index 76b6b7d..e8bc148 100644
--- a/configs/Mini-X_defconfig
+++ b/configs/Mini-X_defconfig
@@ -6,9 +6,7 @@
CONFIG_USB0_VBUS_PIN="PB9"
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig
index 5b1a1d4..b660234 100644
--- a/configs/Nintendo_NES_Classic_Edition_defconfig
+++ b/configs/Nintendo_NES_Classic_Edition_defconfig
@@ -9,8 +9,6 @@
CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
CONFIG_AXP_GPIO=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MTDPARTS=y
# CONFIG_MMC is not set
diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig
index ba976f8..c89a9a1 100644
--- a/configs/Orangepi_defconfig
+++ b/configs/Orangepi_defconfig
@@ -12,9 +12,7 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig
index 720e9e5..8757dcb 100644
--- a/configs/Orangepi_mini_defconfig
+++ b/configs/Orangepi_mini_defconfig
@@ -14,9 +14,7 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig
index 2d33331..238b007 100644
--- a/configs/Sinlinx_SinA31s_defconfig
+++ b/configs/Sinlinx_SinA31s_defconfig
@@ -10,8 +10,6 @@
CONFIG_USB1_VBUS_PIN=""
CONFIG_USB2_VBUS_PIN=""
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig
index fcee14b..4eb5300 100644
--- a/configs/Sinlinx_SinA33_defconfig
+++ b/configs/Sinlinx_SinA33_defconfig
@@ -13,8 +13,6 @@
CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_DFU=y
CONFIG_DFU_RAM=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
diff --git a/configs/Sinovoip_BPI_M2_defconfig b/configs/Sinovoip_BPI_M2_defconfig
index c080a24..aba9527 100644
--- a/configs/Sinovoip_BPI_M2_defconfig
+++ b/configs/Sinovoip_BPI_M2_defconfig
@@ -7,8 +7,6 @@
CONFIG_USB1_VBUS_PIN=""
CONFIG_USB2_VBUS_PIN=""
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig
index 9760f9f..5116fab 100644
--- a/configs/Sinovoip_BPI_M3_defconfig
+++ b/configs/Sinovoip_BPI_M3_defconfig
@@ -16,8 +16,6 @@
CONFIG_SATAPWR="PD25"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_PHY_REALTEK=y
CONFIG_SUN8I_EMAC=y
CONFIG_INITIAL_USB_SCAN_DELAY=500
diff --git a/configs/Sunchip_CX-A99_defconfig b/configs/Sunchip_CX-A99_defconfig
index 749bf1c..bb62ae9 100644
--- a/configs/Sunchip_CX-A99_defconfig
+++ b/configs/Sunchip_CX-A99_defconfig
@@ -12,5 +12,3 @@
CONFIG_USB1_VBUS_PIN="PL7"
CONFIG_USB3_VBUS_PIN="PL8"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x18000
-CONFIG_SYS_PBSIZE=1024
diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig
index 4e6652d..b021b0a 100644
--- a/configs/UTOO_P66_defconfig
+++ b/configs/UTOO_P66_defconfig
@@ -20,9 +20,7 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_VIDEO_LCD_TL059WV5C0=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Wexler_TAB7200_defconfig b/configs/Wexler_TAB7200_defconfig
index f63d18c..101ce57 100644
--- a/configs/Wexler_TAB7200_defconfig
+++ b/configs/Wexler_TAB7200_defconfig
@@ -13,9 +13,7 @@
CONFIG_VIDEO_LCD_BL_EN="PH7"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig
index c9d2253..f401ac7 100644
--- a/configs/Wits_Pro_A20_DKT_defconfig
+++ b/configs/Wits_Pro_A20_DKT_defconfig
@@ -12,9 +12,7 @@
CONFIG_VIDEO_LCD_PANEL_LVDS=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/Wobo_i5_defconfig b/configs/Wobo_i5_defconfig
index ab919c0..e0687bf 100644
--- a/configs/Wobo_i5_defconfig
+++ b/configs/Wobo_i5_defconfig
@@ -7,9 +7,7 @@
CONFIG_MMC0_CD_PIN="PB3"
CONFIG_USB1_VBUS_PIN="PG12"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Yones_Toptech_BD1078_defconfig b/configs/Yones_Toptech_BD1078_defconfig
index 1117e14..f1ceb8b 100644
--- a/configs/Yones_Toptech_BD1078_defconfig
+++ b/configs/Yones_Toptech_BD1078_defconfig
@@ -19,9 +19,7 @@
# CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/Yones_Toptech_BS1078_V2_defconfig b/configs/Yones_Toptech_BS1078_V2_defconfig
index ef30aee..6701ecc 100644
--- a/configs/Yones_Toptech_BS1078_V2_defconfig
+++ b/configs/Yones_Toptech_BS1078_V2_defconfig
@@ -16,7 +16,5 @@
CONFIG_VIDEO_LCD_BL_PWM="PH13"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DLDO1_VOLT=3300
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/a64-olinuxino-emmc_defconfig b/configs/a64-olinuxino-emmc_defconfig
index afa0c24..8ec9eb3 100644
--- a/configs/a64-olinuxino-emmc_defconfig
+++ b/configs/a64-olinuxino-emmc_defconfig
@@ -6,9 +6,6 @@
CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig
index ccb5abc..16cef18 100644
--- a/configs/a64-olinuxino_defconfig
+++ b/configs/a64-olinuxino_defconfig
@@ -6,9 +6,6 @@
CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/amarula_a64_relic_defconfig b/configs/amarula_a64_relic_defconfig
index 72f97ce..ae44b66 100644
--- a/configs/amarula_a64_relic_defconfig
+++ b/configs/amarula_a64_relic_defconfig
@@ -7,9 +7,6 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_VIDEO_DE2 is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig
index 66c444f..b89dd8e 100644
--- a/configs/ba10_tv_box_defconfig
+++ b/configs/ba10_tv_box_defconfig
@@ -9,9 +9,7 @@
CONFIG_USB2_VBUS_PIN="PH12"
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig
index 290e9c1..0fbb619 100644
--- a/configs/bananapi_m1_plus_defconfig
+++ b/configs/bananapi_m1_plus_defconfig
@@ -9,9 +9,7 @@
CONFIG_GMAC_TX_DELAY=3
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_NETCONSOLE=y
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
diff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig
index e6b8f0f..588eea2 100644
--- a/configs/bananapi_m2_berry_defconfig
+++ b/configs/bananapi_m2_berry_defconfig
@@ -9,9 +9,7 @@
# CONFIG_HAS_ARMV7_SECURE_BASE is not set
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
diff --git a/configs/bananapi_m2_plus_h3_defconfig b/configs/bananapi_m2_plus_h3_defconfig
index d0981f6..26ced59 100644
--- a/configs/bananapi_m2_plus_h3_defconfig
+++ b/configs/bananapi_m2_plus_h3_defconfig
@@ -7,8 +7,6 @@
CONFIG_MACPWR="PD6"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/bananapi_m2_plus_h5_defconfig b/configs/bananapi_m2_plus_h5_defconfig
index a68742e..fb6c945 100644
--- a/configs/bananapi_m2_plus_h5_defconfig
+++ b/configs/bananapi_m2_plus_h5_defconfig
@@ -7,9 +7,6 @@
CONFIG_MACPWR="PD6"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/bananapi_m2_zero_defconfig b/configs/bananapi_m2_zero_defconfig
index 6a3594c..ac3f8f5 100644
--- a/configs/bananapi_m2_zero_defconfig
+++ b/configs/bananapi_m2_zero_defconfig
@@ -6,5 +6,3 @@
CONFIG_DRAM_CLK=408
CONFIG_MMC0_CD_PIN=""
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig
index 36aa80a..5463b04 100644
--- a/configs/bananapi_m64_defconfig
+++ b/configs/bananapi_m64_defconfig
@@ -7,9 +7,6 @@
CONFIG_MMC0_CD_PIN="PH13"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/beelink_gs1_defconfig b/configs/beelink_gs1_defconfig
index 2c440e4..42925ea 100644
--- a/configs/beelink_gs1_defconfig
+++ b/configs/beelink_gs1_defconfig
@@ -8,9 +8,6 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_PSCI_RESET is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x118000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/beelink_x2_defconfig b/configs/beelink_x2_defconfig
index 4065e64..6206d90 100644
--- a/configs/beelink_x2_defconfig
+++ b/configs/beelink_x2_defconfig
@@ -6,7 +6,5 @@
CONFIG_DRAM_CLK=567
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/colorfly_e708_q1_defconfig b/configs/colorfly_e708_q1_defconfig
index f170833..5d3636e 100644
--- a/configs/colorfly_e708_q1_defconfig
+++ b/configs/colorfly_e708_q1_defconfig
@@ -16,8 +16,6 @@
CONFIG_VIDEO_LCD_BL_PWM="PH13"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DLDO1_VOLT=3300
CONFIG_AXP_DLDO2_VOLT=1800
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/difrnce_dit4350_defconfig b/configs/difrnce_dit4350_defconfig
index a3917ea..e1067b6 100644
--- a/configs/difrnce_dit4350_defconfig
+++ b/configs/difrnce_dit4350_defconfig
@@ -15,9 +15,7 @@
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/dserve_dsrv9703c_defconfig b/configs/dserve_dsrv9703c_defconfig
index c737cdb..60910c3 100644
--- a/configs/dserve_dsrv9703c_defconfig
+++ b/configs/dserve_dsrv9703c_defconfig
@@ -14,9 +14,7 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/emlid_neutis_n5_devboard_defconfig b/configs/emlid_neutis_n5_devboard_defconfig
index 73121f2..a3b43df 100644
--- a/configs/emlid_neutis_n5_devboard_defconfig
+++ b/configs/emlid_neutis_n5_devboard_defconfig
@@ -8,7 +8,4 @@
# CONFIG_DRAM_ODT_EN is not set
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUPPORT_EMMC_BOOT=y
diff --git a/configs/ga10h_v1_1_defconfig b/configs/ga10h_v1_1_defconfig
index 7cdb6c5..599eeb9 100644
--- a/configs/ga10h_v1_1_defconfig
+++ b/configs/ga10h_v1_1_defconfig
@@ -17,8 +17,6 @@
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DLDO1_VOLT=3300
CONFIG_CONS_INDEX=5
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/gt90h_v4_defconfig b/configs/gt90h_v4_defconfig
index c81f0f6..1a5fe06 100644
--- a/configs/gt90h_v4_defconfig
+++ b/configs/gt90h_v4_defconfig
@@ -16,8 +16,6 @@
CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DLDO1_VOLT=3300
CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/h8_homlet_v2_defconfig b/configs/h8_homlet_v2_defconfig
index 8af0b3c..29f9652 100644
--- a/configs/h8_homlet_v2_defconfig
+++ b/configs/h8_homlet_v2_defconfig
@@ -11,8 +11,6 @@
CONFIG_AXP_GPIO=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DLDO4_VOLT=3300
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig
index 29cea18..257dd89 100644
--- a/configs/i12-tvbox_defconfig
+++ b/configs/i12-tvbox_defconfig
@@ -7,9 +7,7 @@
CONFIG_MACPWR="PH21"
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/iNet_3F_defconfig b/configs/iNet_3F_defconfig
index 8b69364..436e3a8 100644
--- a/configs/iNet_3F_defconfig
+++ b/configs/iNet_3F_defconfig
@@ -14,9 +14,7 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/iNet_3W_defconfig b/configs/iNet_3W_defconfig
index a05876a..6978f8b 100644
--- a/configs/iNet_3W_defconfig
+++ b/configs/iNet_3W_defconfig
@@ -14,9 +14,7 @@
CONFIG_VIDEO_LCD_BL_EN="PH7"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/iNet_86VS_defconfig b/configs/iNet_86VS_defconfig
index 3a9f308..2c8ecb5 100644
--- a/configs/iNet_86VS_defconfig
+++ b/configs/iNet_86VS_defconfig
@@ -13,9 +13,7 @@
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/iNet_D978_rev2_defconfig b/configs/iNet_D978_rev2_defconfig
index 664745c..9a90252 100644
--- a/configs/iNet_D978_rev2_defconfig
+++ b/configs/iNet_D978_rev2_defconfig
@@ -17,8 +17,6 @@
CONFIG_VIDEO_LCD_BL_PWM="PH0"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DLDO1_VOLT=3300
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_CONS_INDEX=5
diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig
index e50db01..c759d7e 100644
--- a/configs/icnova-a20-swac_defconfig
+++ b/configs/icnova-a20-swac_defconfig
@@ -17,9 +17,7 @@
CONFIG_VIDEO_LCD_POWER="PH22"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_UNZIP=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
diff --git a/configs/inet1_defconfig b/configs/inet1_defconfig
index dae6b23..f81120b 100644
--- a/configs/inet1_defconfig
+++ b/configs/inet1_defconfig
@@ -14,9 +14,7 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/inet86dz_defconfig b/configs/inet86dz_defconfig
index 0382a4a..3ade9fe 100644
--- a/configs/inet86dz_defconfig
+++ b/configs/inet86dz_defconfig
@@ -16,8 +16,6 @@
CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DLDO1_VOLT=3300
CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/inet97fv2_defconfig b/configs/inet97fv2_defconfig
index f3e374c..d5d2dc3 100644
--- a/configs/inet97fv2_defconfig
+++ b/configs/inet97fv2_defconfig
@@ -13,9 +13,7 @@
CONFIG_VIDEO_LCD_BL_EN="PH7"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/inet98v_rev2_defconfig b/configs/inet98v_rev2_defconfig
index c392fc2..bd6c45b 100644
--- a/configs/inet98v_rev2_defconfig
+++ b/configs/inet98v_rev2_defconfig
@@ -15,9 +15,7 @@
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/inet9f_rev03_defconfig b/configs/inet9f_rev03_defconfig
index 81a1c99..4485f93 100644
--- a/configs/inet9f_rev03_defconfig
+++ b/configs/inet9f_rev03_defconfig
@@ -13,9 +13,7 @@
CONFIG_VIDEO_LCD_BL_EN="PH7"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/inet_q972_defconfig b/configs/inet_q972_defconfig
index a4a828c..1769256 100644
--- a/configs/inet_q972_defconfig
+++ b/configs/inet_q972_defconfig
@@ -15,8 +15,6 @@
CONFIG_VIDEO_LCD_BL_EN="PA25"
CONFIG_VIDEO_LCD_BL_PWM="PH13"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DLDO1_VOLT=3300
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig
index 5fce583..0ff666b 100644
--- a/configs/jesurun_q5_defconfig
+++ b/configs/jesurun_q5_defconfig
@@ -8,9 +8,7 @@
CONFIG_USB0_VBUS_PIN="PB9"
CONFIG_VIDEO_COMPOSITE=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/libretech_all_h3_cc_h2_plus_defconfig b/configs/libretech_all_h3_cc_h2_plus_defconfig
index ca99556..8725fe6 100644
--- a/configs/libretech_all_h3_cc_h2_plus_defconfig
+++ b/configs/libretech_all_h3_cc_h2_plus_defconfig
@@ -6,8 +6,6 @@
CONFIG_DRAM_CLK=672
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig
index 7ca312c..5275fdc 100644
--- a/configs/libretech_all_h3_cc_h3_defconfig
+++ b/configs/libretech_all_h3_cc_h3_defconfig
@@ -6,8 +6,6 @@
CONFIG_DRAM_CLK=672
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig
index 13ff758..9627401 100644
--- a/configs/libretech_all_h3_cc_h5_defconfig
+++ b/configs/libretech_all_h3_cc_h5_defconfig
@@ -6,9 +6,6 @@
CONFIG_DRAM_CLK=672
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/libretech_all_h3_it_h5_defconfig b/configs/libretech_all_h3_it_h5_defconfig
index 75280ee..cb7ffb4 100644
--- a/configs/libretech_all_h3_it_h5_defconfig
+++ b/configs/libretech_all_h3_it_h5_defconfig
@@ -7,9 +7,6 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SPI_FLASH_XMC=y
CONFIG_SPI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/libretech_all_h5_cc_h5_defconfig b/configs/libretech_all_h5_cc_h5_defconfig
index f42747e..c3aa4b1 100644
--- a/configs/libretech_all_h5_cc_h5_defconfig
+++ b/configs/libretech_all_h5_cc_h5_defconfig
@@ -7,9 +7,6 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SPI_FLASH_XMC=y
CONFIG_SUN8I_EMAC=y
CONFIG_SPI=y
diff --git a/configs/licheepi_nano_defconfig b/configs/licheepi_nano_defconfig
index a9776bb..12a43c1 100644
--- a/configs/licheepi_nano_defconfig
+++ b/configs/licheepi_nano_defconfig
@@ -1,7 +1,4 @@
CONFIG_ARM=y
-CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
-CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
-CONFIG_SYS_DCACHE_OFF=y
CONFIG_ARCH_SUNXI=y
CONFIG_DEFAULT_DEVICE_TREE="suniv-f1c100s-licheepi-nano"
CONFIG_SPL=y
@@ -10,8 +7,6 @@
CONFIG_DRAM_ZQ=0
# CONFIG_VIDEO_SUNXI is not set
CONFIG_SPL_SPI_SUNXI=y
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_XTX=y
CONFIG_SPI=y
diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig
index 11e3dfc..0e4cdc4 100644
--- a/configs/mixtile_loftq_defconfig
+++ b/configs/mixtile_loftq_defconfig
@@ -9,8 +9,6 @@
CONFIG_USB1_VBUS_PIN="PH24"
CONFIG_USB2_VBUS_PIN=""
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig
index 3ce7e5f..21f7a6e 100644
--- a/configs/mk802_a10s_defconfig
+++ b/configs/mk802_a10s_defconfig
@@ -7,9 +7,7 @@
CONFIG_DRAM_EMR1=0
CONFIG_USB1_VBUS_PIN="PB10"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/mk802_defconfig b/configs/mk802_defconfig
index 0fd8d3a..416565e 100644
--- a/configs/mk802_defconfig
+++ b/configs/mk802_defconfig
@@ -5,8 +5,6 @@
CONFIG_MACH_SUN4I=y
CONFIG_USB2_VBUS_PIN="PH12"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/mk802ii_defconfig b/configs/mk802ii_defconfig
index 942911b..965a9cd 100644
--- a/configs/mk802ii_defconfig
+++ b/configs/mk802ii_defconfig
@@ -4,9 +4,7 @@
CONFIG_SPL=y
CONFIG_MACH_SUN4I=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/nanopi_a64_defconfig b/configs/nanopi_a64_defconfig
index 226ccaa..70fc257 100644
--- a/configs/nanopi_a64_defconfig
+++ b/configs/nanopi_a64_defconfig
@@ -5,9 +5,6 @@
CONFIG_MACH_SUN50I=y
CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/nanopi_m1_defconfig b/configs/nanopi_m1_defconfig
index 47a6b78..dc2dbd6 100644
--- a/configs/nanopi_m1_defconfig
+++ b/configs/nanopi_m1_defconfig
@@ -5,7 +5,5 @@
CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=408
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/nanopi_m1_plus_defconfig b/configs/nanopi_m1_plus_defconfig
index c71d721..37b7817 100644
--- a/configs/nanopi_m1_plus_defconfig
+++ b/configs/nanopi_m1_plus_defconfig
@@ -8,8 +8,6 @@
CONFIG_MMC0_CD_PIN="PH13"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig
index 6fedf05..95dd56a 100644
--- a/configs/nanopi_neo2_defconfig
+++ b/configs/nanopi_neo2_defconfig
@@ -7,9 +7,6 @@
CONFIG_DRAM_ZQ=3881977
# CONFIG_DRAM_ODT_EN is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig
index b83b6a3..806d95c 100644
--- a/configs/nanopi_neo_air_defconfig
+++ b/configs/nanopi_neo_air_defconfig
@@ -7,7 +7,5 @@
# CONFIG_VIDEO_DE2 is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig
index f837753..c025519 100644
--- a/configs/nanopi_neo_defconfig
+++ b/configs/nanopi_neo_defconfig
@@ -7,8 +7,6 @@
# CONFIG_VIDEO_DE2 is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig
index 3f834b7..924ff38 100644
--- a/configs/nanopi_neo_plus2_defconfig
+++ b/configs/nanopi_neo_plus2_defconfig
@@ -9,9 +9,6 @@
CONFIG_MACPWR="PD6"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/nanopi_r1s_h5_defconfig b/configs/nanopi_r1s_h5_defconfig
index a0cf8ff..27cf172 100644
--- a/configs/nanopi_r1s_h5_defconfig
+++ b/configs/nanopi_r1s_h5_defconfig
@@ -9,9 +9,6 @@
CONFIG_MACPWR="PD6"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/oceanic_5205_5inmfd_defconfig b/configs/oceanic_5205_5inmfd_defconfig
index 1cd8e9f..7ce63ba 100644
--- a/configs/oceanic_5205_5inmfd_defconfig
+++ b/configs/oceanic_5205_5inmfd_defconfig
@@ -10,9 +10,6 @@
CONFIG_MMC0_CD_PIN=""
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUN8I_EMAC=y
CONFIG_SPI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig
index e18b861..7aaa519 100644
--- a/configs/orangepi_2_defconfig
+++ b/configs/orangepi_2_defconfig
@@ -7,9 +7,7 @@
CONFIG_DRAM_CLK=672
CONFIG_USB1_VBUS_PIN="PG13"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/orangepi_3_defconfig b/configs/orangepi_3_defconfig
index dbca66d..ebecf49 100644
--- a/configs/orangepi_3_defconfig
+++ b/configs/orangepi_3_defconfig
@@ -8,9 +8,6 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_BLUETOOTH_DT_DEVICE_FIXUP="brcm,bcm4345c5"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x118000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_PHY_SUN50I_USB3=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/orangepi_lite2_defconfig b/configs/orangepi_lite2_defconfig
index 14c8806..75c97d6 100644
--- a/configs/orangepi_lite2_defconfig
+++ b/configs/orangepi_lite2_defconfig
@@ -7,8 +7,5 @@
CONFIG_MMC0_CD_PIN="PF6"
# CONFIG_PSCI_RESET is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x118000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/orangepi_lite_defconfig b/configs/orangepi_lite_defconfig
index c717417..96bbd1b 100644
--- a/configs/orangepi_lite_defconfig
+++ b/configs/orangepi_lite_defconfig
@@ -5,7 +5,5 @@
CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=672
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/orangepi_one_defconfig b/configs/orangepi_one_defconfig
index 112ff5e..1064b4a 100644
--- a/configs/orangepi_one_defconfig
+++ b/configs/orangepi_one_defconfig
@@ -5,8 +5,6 @@
CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=672
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/orangepi_one_plus_defconfig b/configs/orangepi_one_plus_defconfig
index a433633..55a8b00 100644
--- a/configs/orangepi_one_plus_defconfig
+++ b/configs/orangepi_one_plus_defconfig
@@ -7,8 +7,5 @@
CONFIG_MMC0_CD_PIN="PF6"
# CONFIG_PSCI_RESET is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x118000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig
index d0cad2a..777af8c 100644
--- a/configs/orangepi_pc2_defconfig
+++ b/configs/orangepi_pc2_defconfig
@@ -8,10 +8,7 @@
CONFIG_MACPWR="PD6"
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig
index 28107ad..905ff7b 100644
--- a/configs/orangepi_pc_defconfig
+++ b/configs/orangepi_pc_defconfig
@@ -5,9 +5,7 @@
CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=624
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig
index 3063867..f845138 100644
--- a/configs/orangepi_pc_plus_defconfig
+++ b/configs/orangepi_pc_plus_defconfig
@@ -6,9 +6,7 @@
CONFIG_DRAM_CLK=624
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig
index 85b25dd..138a6a7 100644
--- a/configs/orangepi_plus2e_defconfig
+++ b/configs/orangepi_plus2e_defconfig
@@ -7,9 +7,7 @@
CONFIG_MACPWR="PD6"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig
index dff0a2f..76de72a 100644
--- a/configs/orangepi_plus_defconfig
+++ b/configs/orangepi_plus_defconfig
@@ -9,9 +9,7 @@
CONFIG_USB1_VBUS_PIN="PG13"
CONFIG_SATAPWR="PG11"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig
index 690a5f1..95a82e2 100644
--- a/configs/orangepi_prime_defconfig
+++ b/configs/orangepi_prime_defconfig
@@ -7,9 +7,6 @@
CONFIG_DRAM_ZQ=3881977
# CONFIG_DRAM_ODT_EN is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/orangepi_r1_defconfig b/configs/orangepi_r1_defconfig
index e15069c..4496aa4 100644
--- a/configs/orangepi_r1_defconfig
+++ b/configs/orangepi_r1_defconfig
@@ -8,8 +8,6 @@
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SUN8I_EMAC=y
CONFIG_SPI=y
diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig
index 7a9ca8e..3b78ad7 100644
--- a/configs/orangepi_win_defconfig
+++ b/configs/orangepi_win_defconfig
@@ -7,9 +7,6 @@
CONFIG_MACPWR="PD14"
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_REALTEK=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig
index cad7a7b..ceef51b 100644
--- a/configs/orangepi_zero2_defconfig
+++ b/configs/orangepi_zero2_defconfig
@@ -9,12 +9,9 @@
CONFIG_MACH_SUN50I_H616=y
CONFIG_MMC0_CD_PIN="PF6"
CONFIG_R_I2C_ENABLE=y
+CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_MAX_SIZE=0xbfa0
-CONFIG_SPL_STACK=0x58000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig
index b6de0b9..f7f3bfb 100644
--- a/configs/orangepi_zero_defconfig
+++ b/configs/orangepi_zero_defconfig
@@ -8,8 +8,6 @@
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig
index 02f70cc..9583d24 100644
--- a/configs/orangepi_zero_plus2_defconfig
+++ b/configs/orangepi_zero_plus2_defconfig
@@ -9,9 +9,6 @@
CONFIG_MMC0_CD_PIN="PH13"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/orangepi_zero_plus2_h3_defconfig b/configs/orangepi_zero_plus2_h3_defconfig
index b2d4f3f..55a2513 100644
--- a/configs/orangepi_zero_plus2_h3_defconfig
+++ b/configs/orangepi_zero_plus2_h3_defconfig
@@ -8,8 +8,6 @@
CONFIG_MMC0_CD_PIN="PH13"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig
index 1552095..f3ecf35 100644
--- a/configs/orangepi_zero_plus_defconfig
+++ b/configs/orangepi_zero_plus_defconfig
@@ -7,9 +7,6 @@
CONFIG_DRAM_ZQ=3881977
# CONFIG_DRAM_ODT_EN is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig
index 14e9b45..d56c450 100644
--- a/configs/parrot_r16_defconfig
+++ b/configs/parrot_r16_defconfig
@@ -11,8 +11,6 @@
CONFIG_USB1_VBUS_PIN="PD12"
CONFIG_AXP_GPIO=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_CONS_INDEX=5
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/pine64-lts_defconfig b/configs/pine64-lts_defconfig
index 3f9ea1e..7e7c2d7 100644
--- a/configs/pine64-lts_defconfig
+++ b/configs/pine64-lts_defconfig
@@ -10,9 +10,6 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig
index 62608f9..f42f4e5 100644
--- a/configs/pine64_plus_defconfig
+++ b/configs/pine64_plus_defconfig
@@ -6,9 +6,6 @@
CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
CONFIG_PINE64_DT_SELECTION=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus"
CONFIG_PHY_REALTEK=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig
index 2f511c8..09a4275 100644
--- a/configs/pine_h64_defconfig
+++ b/configs/pine_h64_defconfig
@@ -11,9 +11,6 @@
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_PSCI_RESET is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x118000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/pinebook_defconfig b/configs/pinebook_defconfig
index 982f681..26918dd 100644
--- a/configs/pinebook_defconfig
+++ b/configs/pinebook_defconfig
@@ -8,9 +8,6 @@
CONFIG_DRAM_ZQ=3881949
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_R_I2C_ENABLE=y
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig
index 531cf0f..28e347b 100644
--- a/configs/pinecube_defconfig
+++ b/configs/pinecube_defconfig
@@ -8,9 +8,7 @@
CONFIG_DRAM_ODT_EN=y
CONFIG_I2C0_ENABLE=y
# CONFIG_HAS_ARMV7_SECURE_BASE is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig
index 905b47d..9d39204 100644
--- a/configs/pinephone_defconfig
+++ b/configs/pinephone_defconfig
@@ -10,9 +10,6 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_PINEPHONE_DT_SELECTION=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2"
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS_GPIO=y
diff --git a/configs/pinetab_defconfig b/configs/pinetab_defconfig
index e20d20a..0cc2414 100644
--- a/configs/pinetab_defconfig
+++ b/configs/pinetab_defconfig
@@ -8,6 +8,3 @@
CONFIG_DRAM_ZQ=3881949
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
diff --git a/configs/polaroid_mid2407pxe03_defconfig b/configs/polaroid_mid2407pxe03_defconfig
index 74ffaf1..17fffeb 100644
--- a/configs/polaroid_mid2407pxe03_defconfig
+++ b/configs/polaroid_mid2407pxe03_defconfig
@@ -16,8 +16,6 @@
CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DLDO1_VOLT=3300
CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/polaroid_mid2809pxe04_defconfig b/configs/polaroid_mid2809pxe04_defconfig
index 10057ad..e542b71 100644
--- a/configs/polaroid_mid2809pxe04_defconfig
+++ b/configs/polaroid_mid2809pxe04_defconfig
@@ -16,8 +16,6 @@
CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DLDO1_VOLT=3300
CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/pov_protab2_ips9_defconfig b/configs/pov_protab2_ips9_defconfig
index 523de63..a62c9f8 100644
--- a/configs/pov_protab2_ips9_defconfig
+++ b/configs/pov_protab2_ips9_defconfig
@@ -14,9 +14,7 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/q8_a13_tablet_defconfig b/configs/q8_a13_tablet_defconfig
index 83981d3..f269b8a 100644
--- a/configs/q8_a13_tablet_defconfig
+++ b/configs/q8_a13_tablet_defconfig
@@ -15,9 +15,7 @@
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"
CONFIG_VIDEO_LCD_BL_PWM="PB2"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/q8_a23_tablet_800x480_defconfig b/configs/q8_a23_tablet_800x480_defconfig
index 11d208a..dda1a0c 100644
--- a/configs/q8_a23_tablet_800x480_defconfig
+++ b/configs/q8_a23_tablet_800x480_defconfig
@@ -16,8 +16,6 @@
CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DLDO1_VOLT=3300
CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/q8_a33_tablet_1024x600_defconfig b/configs/q8_a33_tablet_1024x600_defconfig
index c848e62..7925677 100644
--- a/configs/q8_a33_tablet_1024x600_defconfig
+++ b/configs/q8_a33_tablet_1024x600_defconfig
@@ -16,8 +16,6 @@
CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DLDO1_VOLT=3300
CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/q8_a33_tablet_800x480_defconfig b/configs/q8_a33_tablet_800x480_defconfig
index ee56541..f3335f9 100644
--- a/configs/q8_a33_tablet_800x480_defconfig
+++ b/configs/q8_a33_tablet_800x480_defconfig
@@ -16,8 +16,6 @@
CONFIG_VIDEO_LCD_BL_EN="PH6"
CONFIG_VIDEO_LCD_BL_PWM="PH0"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_AXP_DLDO1_VOLT=3300
CONFIG_CONS_INDEX=5
CONFIG_USB_MUSB_HOST=y
diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig
index f5adbd3..8875a09 100644
--- a/configs/r7-tv-dongle_defconfig
+++ b/configs/r7-tv-dongle_defconfig
@@ -6,9 +6,7 @@
CONFIG_DRAM_CLK=384
CONFIG_USB1_VBUS_PIN="PG13"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig
index 55116f7..fbbef7a 100644
--- a/configs/sopine_baseboard_defconfig
+++ b/configs/sopine_baseboard_defconfig
@@ -11,9 +11,6 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/sun8i_a23_evb_defconfig b/configs/sun8i_a23_evb_defconfig
index 59315cd..a3b1d76 100644
--- a/configs/sun8i_a23_evb_defconfig
+++ b/configs/sun8i_a23_evb_defconfig
@@ -9,8 +9,6 @@
CONFIG_USB0_VBUS_DET="axp_vbus_detect"
CONFIG_USB1_VBUS_PIN="PH7"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_CONS_INDEX=5
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/sunxi_Gemei_G9_defconfig b/configs/sunxi_Gemei_G9_defconfig
index b77c4e7..3fee7c2 100644
--- a/configs/sunxi_Gemei_G9_defconfig
+++ b/configs/sunxi_Gemei_G9_defconfig
@@ -11,9 +11,7 @@
CONFIG_VIDEO_LCD_BL_PWM="PB2"
CONFIG_VIDEO_LCD_PANEL_LVDS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
CONFIG_SPL_I2C=y
-CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
diff --git a/configs/tanix_tx6_defconfig b/configs/tanix_tx6_defconfig
index 84dbf10..0390347 100644
--- a/configs/tanix_tx6_defconfig
+++ b/configs/tanix_tx6_defconfig
@@ -8,6 +8,3 @@
CONFIG_MMC0_CD_PIN="PF6"
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x118000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
diff --git a/configs/tbs_a711_defconfig b/configs/tbs_a711_defconfig
index 3dd9252..b3c2e69 100644
--- a/configs/tbs_a711_defconfig
+++ b/configs/tbs_a711_defconfig
@@ -13,8 +13,6 @@
CONFIG_USB0_ID_DET="PH11"
CONFIG_AXP_GPIO=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_AXP_DCDC5_VOLT=1200
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/teres_i_defconfig b/configs/teres_i_defconfig
index 6f202dc..e7de85e 100644
--- a/configs/teres_i_defconfig
+++ b/configs/teres_i_defconfig
@@ -9,9 +9,6 @@
CONFIG_USB1_VBUS_PIN="PL7"
CONFIG_I2C0_ENABLE=y
CONFIG_PREBOOT="setenv usb_pgood_delay 2000; usb start"
-CONFIG_SPL_STACK=0x54000
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/x96_mate_defconfig b/configs/x96_mate_defconfig
new file mode 100644
index 0000000..4276f4f
--- /dev/null
+++ b/configs/x96_mate_defconfig
@@ -0,0 +1,15 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h616-x96-mate"
+CONFIG_SPL=y
+CONFIG_DRAM_SUN50I_H616_READ_CALIBRATION=y
+CONFIG_MACH_SUN50I_H616=y
+CONFIG_MMC0_CD_PIN="PF6"
+CONFIG_R_I2C_ENABLE=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
+CONFIG_SUPPORT_EMMC_BOOT=y
diff --git a/configs/zeropi_defconfig b/configs/zeropi_defconfig
index 7d45440..11f3715 100644
--- a/configs/zeropi_defconfig
+++ b/configs/zeropi_defconfig
@@ -8,8 +8,6 @@
# CONFIG_VIDEO_DE2 is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
-CONFIG_SPL_STACK=0x8000
-CONFIG_SYS_PBSIZE=1024
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 9ce2bc1..061104b 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -245,6 +245,7 @@
#else
{ "uart0", 5 }, /* PE0-PE1 */
#endif
+ { "uart1", 5 }, /* PA0-PA3 */
};
static const struct sunxi_pinctrl_desc __maybe_unused suniv_f1c100s_pinctrl_desc = {
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 0f0ef4f..fe90d55 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -135,7 +135,21 @@
#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FF00000))
-#elif defined(CONFIG_MACH_SUN8I_V3S)
+#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 256)
+/*
+ * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
+ * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
+ * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
+ */
+#define BOOTM_SIZE __stringify(0xa000000)
+#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
+#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
+#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
+#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
+#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000))
+#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000))
+
+#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 64)
/*
* 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
* 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
@@ -149,33 +163,22 @@
#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000))
-#elif defined(CONFIG_MACH_SUNIV)
+#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 32)
/*
- * 32M RAM minus 1MB heap + 8MB for u-boot, stack, fb, etc.
- * 8M uncompressed kernel, 4M compressed kernel, 512K fdt,
- * 512K script, 512K pxe and the ramdisk at the end.
+ * 32M RAM minus 2.5MB for u-boot, heap, stack, etc.
+ * 16M uncompressed kernel, 7M compressed kernel, 128K fdt, 64K script,
+ * 128K DT overlay, 128K PXE and the ramdisk in the rest (max. 5MB)
*/
#define BOOTM_SIZE __stringify(0x1700000)
-#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0500000))
-#define FDT_ADDR_R __stringify(SDRAM_OFFSET(0C00000))
-#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(0C50000))
-#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(0D00000))
-#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(0D50000))
-#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(0D60000))
+#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
+#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1d50000))
+#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1d40000))
+#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1d00000))
+#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1d20000))
+#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1800000))
#else
-/*
- * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
- * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
- * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
- */
-#define BOOTM_SIZE __stringify(0xa000000)
-#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
-#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
-#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
-#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
-#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000))
-#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000))
+#error Need at least 32MB of DRAM. Please adjust load addresses.
#endif
#define MEM_LAYOUT_ENV_SETTINGS \
diff --git a/include/dt-bindings/clock/sun50i-h6-r-ccu.h b/include/dt-bindings/clock/sun50i-h6-r-ccu.h
index 890368d..a96087a 100644
--- a/include/dt-bindings/clock/sun50i-h6-r-ccu.h
+++ b/include/dt-bindings/clock/sun50i-h6-r-ccu.h
@@ -22,5 +22,6 @@
#define CLK_W1 12
#define CLK_R_APB2_RSB 13
+#define CLK_R_APB1_RTC 14
#endif /* _DT_BINDINGS_CLK_SUN50I_H6_R_CCU_H_ */
diff --git a/include/dt-bindings/clock/sun50i-h616-ccu.h b/include/dt-bindings/clock/sun50i-h616-ccu.h
index 4fc08b0..1191aca 100644
--- a/include/dt-bindings/clock/sun50i-h616-ccu.h
+++ b/include/dt-bindings/clock/sun50i-h616-ccu.h
@@ -111,5 +111,6 @@
#define CLK_BUS_TVE0 125
#define CLK_HDCP 126
#define CLK_BUS_HDCP 127
+#define CLK_PLL_SYSTEM_32K 128
#endif /* _DT_BINDINGS_CLK_SUN50I_H616_H_ */
diff --git a/include/dt-bindings/clock/sun6i-rtc.h b/include/dt-bindings/clock/sun6i-rtc.h
new file mode 100644
index 0000000..c845493
--- /dev/null
+++ b/include/dt-bindings/clock/sun6i-rtc.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+
+#ifndef _DT_BINDINGS_CLK_SUN6I_RTC_H_
+#define _DT_BINDINGS_CLK_SUN6I_RTC_H_
+
+#define CLK_OSC32K 0
+#define CLK_OSC32K_FANOUT 1
+#define CLK_IOSC 2
+
+#endif /* _DT_BINDINGS_CLK_SUN6I_RTC_H_ */