commit 743a77373bfa22ca099b30d4ac88d95a2f98d1b6
author David Wu <david.wu@rock-chips.com> Tue Apr 16 21:57:05 2019 +0800
committer Kever Yang <kever.yang@rock-chips.com> Wed May 08 17:34:12 2019 +0800
tree 18a6da958eeb1a7d8edcff07feb57fc29e568e93
parent 956362c84b0422ea99da947feca2878193c26ade

pinctrl: rockchip: Split the common set_pull() func into per Soc

As the common set_mux func(), implement the feature at the own file
for each Soc.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

drivers/pinctrl/rockchip/pinctrl-rk3036.c

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
index 8969aea..498b633 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
@@ -53,6 +53,27 @@
 	*bit = pin_num % RK3036_PULL_PINS_PER_REG;
 };
 
+static int rk3036_set_pull(struct rockchip_pin_bank *bank,
+			   int pin_num, int pull)
+{
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit;
+	u32 data;
+
+	if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT &&
+	    pull != PIN_CONFIG_BIAS_DISABLE)
+		return -ENOTSUPP;
+
+	rk3036_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit);
+	data = BIT(bit + 16);
+	if (pull == PIN_CONFIG_BIAS_DISABLE)
+		data |= BIT(bit);
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
 static struct rockchip_pin_bank rk3036_pin_banks[] = {
 	PIN_BANK(0, 32, "gpio0"),
 	PIN_BANK(1, 32, "gpio1"),
@@ -66,7 +87,7 @@
 	.type			= RK3036,
 	.grf_mux_offset		= 0xa8,
 	.set_mux		= rk3036_set_mux,
-	.pull_calc_reg		= rk3036_calc_pull_reg_and_bit,
+	.set_pull		= rk3036_set_pull,
 };
 
 static const struct udevice_id rk3036_pinctrl_ids[] = {