commit | 7544ad0303013e625c9500a4d87d4e5bfe369ee4 | [log] [tgz] |
---|---|---|
author | Marek Vasut <marex@denx.de> | Tue May 08 20:32:01 2018 +0200 |
committer | Marek Vasut <marex@denx.de> | Sat Mar 09 17:59:13 2019 +0100 |
tree | 154edeedce6b844c79ee7aaa325f5f51d6e03b0e | |
parent | dc3249b91b0c5dffdbd42426a3535bea5e14448f [diff] |
ARM: socfpga: Disable D cache in SPL The bootrom seems to leave the D-cache in messed up state, make sure the SPL disables it so it can not interfere with operation. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>