arm64: zynqmp: Label whole PL part as fpga_full region
This will simplify dt overlay structure for the whole PL.
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 3dd17e6..877874e 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -282,7 +282,14 @@
compatible = "arm,cortex-a53-edac";
};
- pcap {
+ fpga_full: fpga-full {
+ compatible = "fpga-region";
+ fpga-mgr = <&pcap>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ };
+
+ pcap: pcap {
compatible = "xlnx,zynqmp-pcap-fpga";
};