commit 774171020beaf3af19dcc8056c9de38653bc121b
author Vikas Manocha <vikas.manocha@st.com> Mon Apr 10 15:02:57 2017 -0700
committer Tom Rini <trini@konsulko.com> Mon May 08 11:57:02 2017 -0400
tree e2f3f1648560c3ac736ad83bbaa3b94ec7842ba5
parent 6c9a10034a21680c4b2595d9b6468a767dedebca

dm: gpio: Add driver for stm32f7 gpio controller

This patch adds gpio driver supporting driver model for stm32f7 gpio.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Christophe KERELLO <christophe.kerello@st.com>
[trini: Add depends on STM32]
Signed-off-by: Tom Rini <trini@konsulko.com>

drivers/pinctrl/pinctrl_stm32.c

diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index aa2c440..0e74d05 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -1,10 +1,45 @@
 #include <common.h>
-#include <asm/arch/gpio.h>
 #include <dm.h>
 #include <dm/pinctrl.h>
+#include <asm/arch/gpio.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define MODE_BITS_MASK			3
+#define OSPEED_MASK			3
+#define PUPD_MASK			3
+#define OTYPE_MSK			1
+#define AFR_MASK			0xF
+
+static int stm32_gpio_config(struct gpio_desc *desc,
+			     const struct stm32_gpio_ctl *ctl)
+{
+	struct stm32_gpio_priv *priv = dev_get_priv(desc->dev);
+	struct stm32_gpio_regs *regs = priv->regs;
+	u32 index;
+
+	if (!ctl || ctl->af > 15 || ctl->mode > 3 || ctl->otype > 1 ||
+	    ctl->pupd > 2 || ctl->speed > 3)
+		return -EINVAL;
+
+	index = (desc->offset & 0x07) * 4;
+	clrsetbits_le32(&regs->afr[desc->offset >> 3], AFR_MASK << index,
+			ctl->af << index);
+
+	index = desc->offset * 2;
+	clrsetbits_le32(&regs->moder, MODE_BITS_MASK << index,
+			ctl->mode << index);
+	clrsetbits_le32(&regs->ospeedr, OSPEED_MASK << index,
+			ctl->speed << index);
+	clrsetbits_le32(&regs->pupdr, PUPD_MASK << index, ctl->pupd << index);
+
+	index = desc->offset;
+	clrsetbits_le32(&regs->otyper, OTYPE_MSK << index, ctl->otype << index);
+
+	return 0;
+}
 static int prep_gpio_dsc(struct stm32_gpio_dsc *gpio_dsc, u32 port_pin)
 {
 	gpio_dsc->port = (port_pin & 0xF000) >> 12;
@@ -18,6 +53,7 @@
 static int prep_gpio_ctl(struct stm32_gpio_ctl *gpio_ctl, u32 gpio_fn, int node)
 {
 	gpio_fn &= 0x00FF;
+	gpio_ctl->af = 0;
 
 	switch (gpio_fn) {
 	case 0: