rockchip: px30: default TPL_SYS_MALLOC_F_LEN to 0x600 on PX30 Kconfig level
This is the kind of setting that typically doesn't need to be changed
between boards based on the same SoC, so let's make it the default in
PX30 Kconfig so we don't have to care about it in the defconfig if we
don't want to.
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig
index 23f8f43..e394726 100644
--- a/arch/arm/mach-rockchip/px30/Kconfig
+++ b/arch/arm/mach-rockchip/px30/Kconfig
@@ -83,6 +83,9 @@
config TPL_STACK
default 0xff0e4fff
+config TPL_SYS_MALLOC_F_LEN
+ default 0x600
+
config DEBUG_UART_CHANNEL
int "Mux channel to use for debug UART2/UART3"
depends on DEBUG_UART_BOARD_INIT
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 07c56a4..73a3c61 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -16,7 +16,6 @@
CONFIG_TARGET_EVB_PX30=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x400000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig
index e5377dc..0a14b39 100644
--- a/configs/firefly-px30_defconfig
+++ b/configs/firefly-px30_defconfig
@@ -17,7 +17,6 @@
CONFIG_DEBUG_UART_CHANNEL=1
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x400000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig
index 99d7149..3c1abb8 100644
--- a/configs/odroid-go2_defconfig
+++ b/configs/odroid-go2_defconfig
@@ -19,7 +19,6 @@
CONFIG_DEBUG_UART_CHANNEL=1
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x400000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig
index a2801ec..87a39e1 100644
--- a/configs/px30-core-ctouch2-of10-px30_defconfig
+++ b/configs/px30-core-ctouch2-of10-px30_defconfig
@@ -17,7 +17,6 @@
CONFIG_DEBUG_UART_CHANNEL=1
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x400000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig
index cc33e27..7162c11 100644
--- a/configs/px30-core-ctouch2-px30_defconfig
+++ b/configs/px30-core-ctouch2-px30_defconfig
@@ -17,7 +17,6 @@
CONFIG_DEBUG_UART_CHANNEL=1
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x400000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig
index 99e1b2f..1182f60 100644
--- a/configs/px30-core-edimm2.2-px30_defconfig
+++ b/configs/px30-core-edimm2.2-px30_defconfig
@@ -17,7 +17,6 @@
CONFIG_DEBUG_UART_CHANNEL=1
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x400000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig
index 67a44ed..0df1b8a 100644
--- a/configs/ringneck-px30_defconfig
+++ b/configs/ringneck-px30_defconfig
@@ -17,7 +17,6 @@
CONFIG_TARGET_RINGNECK_PX30=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x400000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y