dm: pch: Add get_io_base op
On some newer chipset (eg: BayTrail), there is an IO base address
register on the PCH device which configures the base address of a
memory-mapped I/O controller.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
diff --git a/drivers/pch/pch-uclass.c b/drivers/pch/pch-uclass.c
index 48a3965..7216660 100644
--- a/drivers/pch/pch-uclass.c
+++ b/drivers/pch/pch-uclass.c
@@ -44,6 +44,17 @@
return ops->get_gpio_base(dev, gbasep);
}
+int pch_get_io_base(struct udevice *dev, u32 *iobasep)
+{
+ struct pch_ops *ops = pch_get_ops(dev);
+
+ *iobasep = 0;
+ if (!ops->get_io_base)
+ return -ENOSYS;
+
+ return ops->get_io_base(dev, iobasep);
+}
+
static int pch_uclass_post_bind(struct udevice *bus)
{
/*