commit 7b3d5380eea55f5b2e21c592b256b7077698f766
author Ondrej Kupka <ondra.cap@gmail.com> Fri Sep 30 21:05:11 2011 +1100
committer Graeme Russ <graeme.russ@gmail.com> Wed Nov 02 20:48:30 2011 +1100
tree d195398c12668ad2fc7b64cb8a96323cc900309a
parent ce5207e191c59b3135303fd03b98dd2ac3701ba2

x86: turn off cache: set control register properly

Bits should be ORed when they are supposed to be added together

Signed-off-by: Ondrej Kupka <ondra.cap@gmail.com>

arch/x86/cpu/start16.S

diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S
index 3d3017a..9dabff2 100644
--- a/arch/x86/cpu/start16.S
+++ b/arch/x86/cpu/start16.S
@@ -50,7 +50,7 @@
 
 	/* Turn of cache (this might require a 486-class CPU) */
 	movl	%cr0, %eax
-	orl	$(X86_CR0_NW & X86_CR0_CD), %eax
+	orl	$(X86_CR0_NW | X86_CR0_CD), %eax
 	movl	%eax, %cr0
 	wbinvd