commit | 7b50db8242b62c85a19da9521b703faa858f4a63 | [log] [tgz] |
---|---|---|
author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | Thu Apr 16 22:35:11 2020 +0300 |
committer | Alexey Brodkin <abrodkin@synopsys.com> | Thu Apr 16 23:37:10 2020 +0300 |
tree | f095982dd42ec523bd5f9afca93ba4619440c1c4 | |
parent | a6a0b0244bdded02d69e6493219a88ffd0c79bc8 [diff] |
ARC: HSDK: CGU: fix tunnel clock calculation We set wrong tunnel PLL frequency when we request 125MHz tunnel clock. Fix that. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>