Add MPC8544DS README
Signed-off-by: Andy Fleming <afleming@freescale.com>
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+Overview
+--------
+The MPC8544DS system is similar to the 85xx CDS systems such
+as the MPC8548CDS due to the similar E500 core. However, it
+is placed on the same board as the 8641 HPCN system.
+
+
+Flash Banks
+-----------
+Like the 85xx CDS systems, the 8544 DS board has two flash banks.
+They are both present on boot, but there locations can be swapped
+using the dip-switch SW10, bit 2.
+
+However, unlike the CDS systems, but similar to the 8641 HPCN
+board, a runtime reset through the FPGA can also affect a swap
+on the flash bank mappings for the next reset cycle.
+
+Irrespective of the switch SW10[2], booting is always from the
+boot bank at 0xfff8_0000.
+
+
+Memory Map
+----------
+
+0xff80_0000 - 0xffbf_ffff Alernate bank 4MB
+0xffc0_0000 - 0xffff_ffff Boot bank 4MB
+
+0xffb8_0000 Alternate image start 512KB
+0xfff8_0000 Boot image start 512KB
+
+
+Flashing Images
+---------------
+
+For example, to place a new image in the alternate flash bank
+and then reset with that new image temporarily, use this:
+
+ tftp 1000000 u-boot.bin.8544ds
+ erase ffb80000 ffbfffff
+ cp.b 1000000 ffb80000 80000
+ pixis_reset altbank
+
+
+To overwrite the image in the boot flash bank:
+
+ tftp 1000000 u-boot.bin.8544ds
+ protect off all
+ erase fff80000 ffffffff
+ cp.b 1000000 fff80000 80000
+
+Other example U-Boot image and flash manipulations examples
+can be found in the README.mpc85xxcds file as well.
+
+
+The pixis_reset command
+-----------------------
+A new command, "pixis_reset", is introduced to reset mpc8641hpcn board
+using the FPGA sequencer. When the board restarts, it has the option
+of using either the current or alternate flash bank as the boot
+image, with or without the watchdog timer enabled, and finally with
+or without frequency changes.
+
+Usage is;
+
+ pixis_reset
+ pixis_reset altbank
+ pixis_reset altbank wd
+ pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>
+ pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>
+
+Examples;
+
+ /* reset to current bank, like "reset" command */
+ pixis_reset
+
+ /* reset board but use the to alternate flash bank */
+ pixis_reset altbank
+
+ /* reset board, use alternate flash bank with watchdog timer enabled*/
+ pixis_reset altbank wd
+
+ /* reset board to alternate bank with frequency changed.
+ * 40 is SYSCLK, 2.5 is COREPLL ratio, 10 is MPXPLL ratio
+ */
+ pixis-reset altbank cf 40 2.5 10
+
+Valid clock choices are in the 8641 Reference Manuals.
+
+
+Using the Device Tree Source File
+---------------------------------
+To create the DTB (Device Tree Binary) image file,
+use a command similar to this:
+
+ dtc -b 0 -f -I dts -O dtb mpc8544ds.dts > mpc8544ds.dtb
+
+Likely, that .dts file will come from here;
+
+ linux-2.6/arch/powerpc/boot/dts/mpc8544ds.dts
+
+After placing the DTB file in your TFTP disk area,
+you can download that dtb file using a command like:
+
+ tftp 900000 mpc8544ds.dtb
+
+Burn it to flash if you want.
+
+
+Booting Linux
+-------------
+
+Place a linux uImage in the TFTP disk area too.
+
+ tftp 1000000 uImage.8544
+ tftp 900000 mpc8544ds.dtb
+ bootm 1000000 - 900000
+
+Watch your ethact, netdev and bootargs U-Boot environment variables.
+You may want to do something like this too:
+
+ setenv ethact eTSEC3
+ setenv netdev eth1