commit 7c2c235a27c7b7198742f37fbe20877e17b6e3ea
author Billy Tsai <billy_tsai@aspeedtech.com> Tue Aug 20 15:27:36 2024 +0800
committer Tom Rini <trini@konsulko.com> Tue Aug 27 18:01:38 2024 -0600
tree f3566c56e3c22c9f6caf0b762db1a92121c66e7c
parent 1bf048f21bdc3834de5aac216b1e7bfce90364d9

gpio: Add G7 Aspeed gpio controller driver

In the 7th generation of the SoC from Aspeed, the control logic of the
GPIO controller has been updated to support per-pin control. Each pin now
has its own 32-bit register, allowing for individual control of the pin’s
value, direction, interrupt type, and other settings.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>

drivers/gpio/Makefile

diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index cc54df4..da0faf0 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -13,6 +13,7 @@
 obj-$(CONFIG_$(SPL_)DM_PCA953X)	+= pca953x_gpio.o
 
 obj-$(CONFIG_ASPEED_GPIO)	+= gpio-aspeed.o
+obj-$(CONFIG_ASPEED_G7_GPIO)	+= gpio-aspeed-g7.o
 obj-$(CONFIG_AT91_GPIO)	+= at91_gpio.o
 obj-$(CONFIG_ATMEL_PIO4)	+= atmel_pio4.o
 obj-$(CONFIG_BCM6345_GPIO)	+= bcm6345_gpio.o