| commit | 7c45fc9870ad7cb3f4516e39454c3e75ab0c4cfb | [log] [tgz] |
|---|---|---|
| author | Pragnesh Patel <pragnesh.patel@sifive.com> | Fri May 29 11:33:34 2020 +0530 |
| committer | Andes <uboot@andestech.com> | Thu Jun 04 09:44:09 2020 +0800 |
| tree | df338133e8def1152c763175f6c428442fee873f | |
| parent | 25d0853fcbf96a26061354231de1a3c4417623d9 [diff] |
riscv: cpu: fu540: Add support for cpu fu540 Add SiFive fu540 cpu to support RISC-V arch Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>