commit 7d54f022bbf51f7ad7e48937379705e557591557
author Allen Martin <amartin@nvidia.com> Tue Jan 29 13:51:25 2013 +0000
committer Tom Warren <twarren@nvidia.com> Mon Feb 11 10:35:24 2013 -0700
tree 28e8a5ae76ca405b5a8789c55ab637eb2d76108d
parent 8f1b46b10480e7fe140d5656c76f6f6de1739f13

tegra30: add SBC1 to periph id mapping table

SBC1 is SPI controller 1 on tegra30

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

arch/arm/cpu/tegra30-common/clock.c

diff --git a/arch/arm/cpu/tegra30-common/clock.c b/arch/arm/cpu/tegra30-common/clock.c
index ee3c8b1..a93f2c9 100644
--- a/arch/arm/cpu/tegra30-common/clock.c
+++ b/arch/arm/cpu/tegra30-common/clock.c
@@ -290,7 +290,7 @@
 
 	/* 40 */
 	NONE(KFUSE),
-	NONE(SBC1),     /* SBC1, 0x34, is this SPI1? */
+	PERIPHC_SBC1,
 	PERIPHC_NOR,
 	NONE(RESERVED43),
 	PERIPHC_SBC2,