arm: mvebu: Support for 98DX25xx/98DX35xx SoC
Add support for the Allecat5/Alleycat5X SoC. These are L3 switches with
an integrated CPU (referred to as the CnM block in Marvell's
documentation). These have dual ARMv8.2 CPUs (Cortex-A55). This support
has been ported from Marvell's SDK which is based on a much older
version of U-Boot.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c
index 63f6af5..e3098a7 100644
--- a/arch/arm/mach-mvebu/arm64-common.c
+++ b/arch/arm/mach-mvebu/arm64-common.c
@@ -53,6 +53,8 @@
return a8k_dram_init_banksize();
else if (CONFIG_IS_ENABLED(ARMADA_3700))
return a3700_dram_init_banksize();
+ else if (CONFIG_IS_ENABLED(ALLEYCAT_5))
+ return alleycat5_dram_init_banksize();
else
return fdtdec_setup_memory_banksize();
}
@@ -68,6 +70,9 @@
if (CONFIG_IS_ENABLED(ARMADA_3700))
return a3700_dram_init();
+ if (CONFIG_IS_ENABLED(ALLEYCAT_5))
+ return alleycat5_dram_init();
+
if (fdtdec_setup_mem_size_base() != 0)
return -EINVAL;