Enabled the Freescale SGMII riser card on 8572DS
This patch based on Andy's work.
Including command 'pixis_set_sgmii' support.
Signed-off-by: Liu Yu <yu.liu@freescale.com>
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index c2606fa..5688589 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -239,6 +239,22 @@
#define PIXIS_VCLKH 0x19 /* VELA VCLKH register */
#define PIXIS_VCLKL 0x1A /* VELA VCLKL register */
#define CONFIG_SYS_PIXIS_VBOOT_MASK 0xc0
+#define PIXIS_VSPEED2_TSEC1SER 0x8
+#define PIXIS_VSPEED2_TSEC2SER 0x4
+#define PIXIS_VSPEED2_TSEC3SER 0x2
+#define PIXIS_VSPEED2_TSEC4SER 0x1
+#define PIXIS_VCFGEN1_TSEC1SER 0x20
+#define PIXIS_VCFGEN1_TSEC2SER 0x20
+#define PIXIS_VCFGEN1_TSEC3SER 0x20
+#define PIXIS_VCFGEN1_TSEC4SER 0x20
+#define PIXIS_VSPEED2_MASK (PIXIS_VSPEED2_TSEC1SER \
+ | PIXIS_VSPEED2_TSEC2SER \
+ | PIXIS_VSPEED2_TSEC3SER \
+ | PIXIS_VSPEED2_TSEC4SER)
+#define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER \
+ | PIXIS_VCFGEN1_TSEC2SER \
+ | PIXIS_VCFGEN1_TSEC3SER \
+ | PIXIS_VCFGEN1_TSEC4SER)
/* define to use L1 as initial stack */
#define CONFIG_L1_INIT_RAM
@@ -418,6 +434,14 @@
#define CONFIG_TSEC4 1
#define CONFIG_TSEC4_NAME "eTSEC4"
+#define CONFIG_PIXIS_SGMII_CMD
+#define CONFIG_FSL_SGMII_RISER 1
+#define SGMII_RISER_PHY_OFFSET 0x1c
+
+#ifdef CONFIG_FSL_SGMII_RISER
+#define CONFIG_SYS_TBIPA_VALUE 0x10 /* avoid conflict with eTSEC4 paddr */
+#endif
+
#define TSEC1_PHY_ADDR 0
#define TSEC2_PHY_ADDR 1
#define TSEC3_PHY_ADDR 2