POST cleanup.
- Revives POST for blackfin arch;
- Removes redundant code:
arch/blackfin/lib/post.c
arch/powerpc/cpu/ppc4xx/commproc.c
arch/powerpc/cpu/mpc512x/common.c
- fixes up the post_word_{load|store} usage.
Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Tested-by: Anatolij Gustschin <agust@denx.de>
List of the maintainers of the affected by patch boards:
Cc: Stephan Linz <linz@li-pro.net>
Cc: Denis Peter <d.peter@mpl.ch>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Niklaus Giger <niklaus.giger@netstal.com>
Cc: Larry Johnson <lrj@acm.org>
Cc: Feng Kan <fkan@amcc.com>
diff --git a/include/common.h b/include/common.h
index 6a79ec2..b7193e6 100644
--- a/include/common.h
+++ b/include/common.h
@@ -585,8 +585,6 @@
uint dpram_base_align(uint align);
uint dpram_alloc(uint size);
uint dpram_alloc_align(uint size,uint align);
-void post_word_store (ulong);
-ulong post_word_load (void);
void bootcount_store (ulong);
ulong bootcount_load (void);
#define BOOTCOUNT_MAGIC 0xB001C041
@@ -727,6 +725,9 @@
#ifdef CONFIG_POST
#define CONFIG_HAS_POST
+#ifndef CONFIG_POST_ALT_LIST
+#define CONFIG_POST_STD_LIST
+#endif
#endif
#ifdef CONFIG_INIT_CRITICAL
diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h
index 49a7378..05f7254 100644
--- a/include/configs/KAREF.h
+++ b/include/configs/KAREF.h
@@ -82,8 +82,7 @@
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Rsrv 256kB for Mon */
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Rsrv 128kB for malloc */
diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h
index e7429dd..30a3035 100644
--- a/include/configs/METROBOX.h
+++ b/include/configs/METROBOX.h
@@ -144,8 +144,7 @@
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Rsrv 256kB for Mon */
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Rsrv 128kB for malloc */
diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index 7e6484e..ff9496b 100644
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -305,10 +305,6 @@
/* reserve some memory for POST and BOOT limit info */
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32)
-#ifdef CONFIG_POST /* reserve one word for POST Info */
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 4)
-#endif
-
#ifdef CONFIG_BOOTCOUNT_LIMIT /* reserve 2 word for bootcount limit */
#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 12)
#endif
diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index 3c19f52..cc0ea7f 100644
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -90,7 +90,7 @@
#define CONFIG_SYS_INIT_RAM_END (4 << 10)
#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
/*-----------------------------------------------------------------------
* Serial Port
@@ -373,7 +373,6 @@
CONFIG_SYS_POST_ETHER | \
CONFIG_SYS_POST_SPR)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
#define CONFIG_LOGBUFFER
#define CONFIG_SYS_POST_CACHE_ADDR 0x7fff0000 /* free virtual address */
diff --git a/include/configs/TB5200.h b/include/configs/TB5200.h
index 6da18eb..7a6602c 100644
--- a/include/configs/TB5200.h
+++ b/include/configs/TB5200.h
@@ -126,7 +126,7 @@
#endif
#ifdef CONFIG_POST
-#define CONFIG__CMD_DIAG
+#define CONFIG_CMD_DIAG
#endif
diff --git a/include/configs/XPEDITE1000.h b/include/configs/XPEDITE1000.h
index cf39aea..dfeaf74 100644
--- a/include/configs/XPEDITE1000.h
+++ b/include/configs/XPEDITE1000.h
@@ -103,8 +103,7 @@
#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
diff --git a/include/configs/alpr.h b/include/configs/alpr.h
index ee0c14d..326b324 100644
--- a/include/configs/alpr.h
+++ b/include/configs/alpr.h
@@ -66,8 +66,7 @@
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc*/
diff --git a/include/configs/barco.h b/include/configs/barco.h
index e00f84a..b1af701 100644
--- a/include/configs/barco.h
+++ b/include/configs/barco.h
@@ -136,6 +136,8 @@
#define CONFIG_LOGBUFFER
#ifdef CONFIG_LOGBUFFER
#define CONFIG_SYS_STDOUT_ADDR 0x1FFC000
+#define CONFIG_SYS_POST_WORD_ADDR \
+ (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_MAX_RAM_SIZE - 4)
#else
#define CONFIG_SYS_STDOUT_ADDR 0x2B9000
#endif
diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h
index 96704d7..fc9784e 100644
--- a/include/configs/bf537-stamp.h
+++ b/include/configs/bf537-stamp.h
@@ -265,6 +265,7 @@
#define FLASH_START_POST_BLOCK 11 /* Should > = 11 */
#define FLASH_END_POST_BLOCK 71 /* Should < = 71 */
#endif
+#define CONFIG_SYS_POST_WORD_ADDR 0xFF903FFC
/* These are for board tests */
#if 0
diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h
index 4476268..91dcacc 100644
--- a/include/configs/bfin_adi_common.h
+++ b/include/configs/bfin_adi_common.h
@@ -50,6 +50,7 @@
# endif
# ifdef CONFIG_POST
# define CONFIG_CMD_DIAG
+# define CONFIG_POST_ALT_LIST
# endif
# ifdef CONFIG_RTC_BFIN
# define CONFIG_CMD_DATE
diff --git a/include/configs/hcu4.h b/include/configs/hcu4.h
index 369b368..26992e7 100644
--- a/include/configs/hcu4.h
+++ b/include/configs/hcu4.h
@@ -72,7 +72,7 @@
#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE
#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
/*-----------------------------------------------------------------------
* Serial Port
@@ -192,7 +192,6 @@
CONFIG_SYS_POST_SPR)
#define CONFIG_SYS_POST_UART_TABLE {UART0_BASE}
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
#undef CONFIG_LOGBUFFER
#define CONFIG_SYS_POST_CACHE_ADDR 0x00800000 /* free virtual address */
#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h
index 26d2d0c..5adcc0f 100644
--- a/include/configs/hcu5.h
+++ b/include/configs/hcu5.h
@@ -86,7 +86,7 @@
#define CONFIG_SYS_INIT_RAM_END (4 << 10)
#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
/*-----------------------------------------------------------------------
* Serial Port
@@ -212,9 +212,8 @@
CONFIG_SYS_POST_FPU | \
CONFIG_SYS_POST_ETHER | \
CONFIG_SYS_POST_SPR)
-#define CONFIG_SYS_POST_UART_TABLE {UART0_BASE}
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
+#define CONFIG_SYS_POST_UART_TABLE {UART0_BASE}
#define CONFIG_SYS_POST_CACHE_ADDR 0x7fff0000 /* free virtual address */
#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
diff --git a/include/configs/hmi1001.h b/include/configs/hmi1001.h
index f9cdcbc..d40b7a9 100644
--- a/include/configs/hmi1001.h
+++ b/include/configs/hmi1001.h
@@ -190,14 +190,16 @@
/* Use ON-Chip SRAM until RAM will be available */
#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
-#ifdef CONFIG_POST
+
/* preserve space for the post_word at end of on-chip SRAM */
+#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4)
+
+#ifdef CONFIG_POST
#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
#else
#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
#endif
-
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
diff --git a/include/configs/icon.h b/include/configs/icon.h
index 7a4e60c..eb419eb 100644
--- a/include/configs/icon.h
+++ b/include/configs/icon.h
@@ -100,8 +100,7 @@
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \
CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
/*
* Serial Port
diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h
index c5b1565..69365e6 100644
--- a/include/configs/inka4x0.h
+++ b/include/configs/inka4x0.h
@@ -200,14 +200,16 @@
/* Use ON-Chip SRAM until RAM will be available */
#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
-#ifdef CONFIG_POST
+
/* preserve space for the post_word at end of on-chip SRAM */
+#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4)
+
+#ifdef CONFIG_POST
#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
#else
#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
#endif
-
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index 2a7ab8d..5d14a10 100644
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -99,8 +99,7 @@
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
/*-----------------------------------------------------------------------
* Serial Port
diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index 48dc946..8f813dd0 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -103,11 +103,10 @@
#if defined(CONFIG_SYS_INIT_DCACHE_CS)
# define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-# define CONFIG_SYS_POST_ALT_WORD_ADDR (CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6)
+# define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6)
#else
# define CONFIG_SYS_INIT_EXTRA_SIZE 16
# define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_INIT_EXTRA_SIZE)
-# define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 4)
# define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_INIT_RAM_ADDR
#endif /* defined(CONFIG_SYS_INIT_DCACHE_CS) */
diff --git a/include/configs/korat.h b/include/configs/korat.h
index f95df68..23da72f 100644
--- a/include/configs/korat.h
+++ b/include/configs/korat.h
@@ -88,7 +88,7 @@
#define CONFIG_SYS_INIT_RAM_END (4 << 10)
#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
/*
* Serial Port
@@ -306,7 +306,6 @@
CONFIG_SYS_POST_SPR | \
CONFIG_SYS_POST_UART)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
#define CONFIG_LOGBUFFER
#define CONFIG_SYS_POST_CACHE_ADDR 0xC8000000 /* free virtual address */
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index 6461124..295a18e 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -84,7 +84,7 @@
#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data*/
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_POST_ALT_WORD_ADDR (CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6)
+#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6)
/* unused GPT0 COMP reg */
#define CONFIG_SYS_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */
/* 440EPx errata CHIP 11 */
diff --git a/include/configs/makalu.h b/include/configs/makalu.h
index 52339f9..f24d499 100644
--- a/include/configs/makalu.h
+++ b/include/configs/makalu.h
@@ -101,11 +101,10 @@
#if defined(CONFIG_SYS_INIT_DCACHE_CS)
# define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-# define CONFIG_SYS_POST_ALT_WORD_ADDR (CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6)
+# define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6)
#else
# define CONFIG_SYS_INIT_EXTRA_SIZE 16
# define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_INIT_EXTRA_SIZE)
-# define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 4)
# define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_INIT_RAM_ADDR
#endif /* defined(CONFIG_SYS_INIT_DCACHE_CS) */
diff --git a/include/configs/mcu25.h b/include/configs/mcu25.h
index 5f31198..50bed10 100644
--- a/include/configs/mcu25.h
+++ b/include/configs/mcu25.h
@@ -72,7 +72,7 @@
#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE
#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
/*-----------------------------------------------------------------------
* Serial Port
@@ -200,7 +200,6 @@
CONFIG_SYS_POST_SPR)
#define CONFIG_SYS_POST_UART_TABLE {UART0_BASE}
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
#undef CONFIG_LOGBUFFER
#define CONFIG_SYS_POST_CACHE_ADDR 0x00800000 /* free virtual address */
#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
diff --git a/include/configs/mpc5121-common.h b/include/configs/mpc5121-common.h
index 96fab20..afae1ab 100644
--- a/include/configs/mpc5121-common.h
+++ b/include/configs/mpc5121-common.h
@@ -30,8 +30,7 @@
#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes of initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \
CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */
#define CONFIG_SYS_MEMTEST_END 0x00400000
diff --git a/include/configs/ocotea.h b/include/configs/ocotea.h
index 2e809b0..9cb66b7 100644
--- a/include/configs/ocotea.h
+++ b/include/configs/ocotea.h
@@ -75,8 +75,7 @@
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
/*-----------------------------------------------------------------------
* Serial Port
diff --git a/include/configs/redwood.h b/include/configs/redwood.h
index 4b744a7..87adbf8 100644
--- a/include/configs/redwood.h
+++ b/include/configs/redwood.h
@@ -87,8 +87,7 @@
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
/*-----------------------------------------------------------------------
* DDR SDRAM
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 568d9fc..ee4391f 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -100,7 +100,7 @@
#define CONFIG_SYS_INIT_RAM_END (4 << 10)
#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
/*
* Serial Port
@@ -357,7 +357,6 @@
CONFIG_SYS_POST_SPR | \
CONFIG_SYS_POST_UART)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
#define CONFIG_LOGBUFFER
#define CONFIG_SYS_POST_CACHE_ADDR 0x7fff0000 /* free virtual address */
diff --git a/include/configs/taishan.h b/include/configs/taishan.h
index 6423fd7..394dd8d 100644
--- a/include/configs/taishan.h
+++ b/include/configs/taishan.h
@@ -71,8 +71,7 @@
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data*/
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
/*-----------------------------------------------------------------------
* Serial Port
diff --git a/include/configs/yucca.h b/include/configs/yucca.h
index 0b4dfb8..798c75a 100644
--- a/include/configs/yucca.h
+++ b/include/configs/yucca.h
@@ -100,8 +100,7 @@
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
/*-----------------------------------------------------------------------
* Serial Port
diff --git a/include/configs/zeus.h b/include/configs/zeus.h
index 3b2aede..29ada9e 100644
--- a/include/configs/zeus.h
+++ b/include/configs/zeus.h
@@ -255,9 +255,10 @@
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 16)
/* extra data in OCM */
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 4)
-#define CONFIG_SYS_POST_MAGIC (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 8)
-#define CONFIG_SYS_POST_VAL (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 12)
+#define CONFIG_SYS_POST_MAGIC \
+ (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 8)
+#define CONFIG_SYS_POST_VAL \
+ (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 12)
/*-----------------------------------------------------------------------
* External Bus Controller (EBC) Setup
diff --git a/include/post.h b/include/post.h
index 3da959d..625da55 100644
--- a/include/post.h
+++ b/include/post.h
@@ -2,6 +2,10 @@
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
+ * (C) Copyright 2010
+ * Michael Zaidman, Kodak, michael.zaidman@kodak.com
+ * post_word_{load|store} cleanup.
+ *
* See file CREDITS for list of people who contributed to this
* project.
*
@@ -25,8 +29,59 @@
#ifndef __ASSEMBLY__
#include <common.h>
+#include <asm/io.h>
+
+#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
+
+#ifdef CONFIG_SYS_POST_WORD_ADDR
+#define _POST_WORD_ADDR CONFIG_SYS_POST_WORD_ADDR
+#else
+
+#ifdef CONFIG_MPC5xxx
+#define _POST_WORD_ADDR (MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE)
+
+#elif defined(CONFIG_MPC512X)
+#define _POST_WORD_ADDR \
+ (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
+
+#elif defined(CONFIG_8xx)
+#define _POST_WORD_ADDR \
+ (((immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_dpmem + CPM_POST_WORD_ADDR)
+
+#elif defined(CONFIG_MPC8260)
+#include <asm/cpm_8260.h>
+#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR)
+
+#elif defined(CONFIG_MPC8360)
+#include <asm/immap_qe.h>
+#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR)
+
+#elif defined (CONFIG_MPC85xx)
+#include <asm/cpm_85xx.h>
+#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR)
+
+#elif defined (CONFIG_4xx)
+#define _POST_WORD_ADDR \
+ (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
#endif
+#ifndef _POST_WORD_ADDR
+#error "_POST_WORD_ADDR currently not implemented for this platform!"
+#endif
+#endif /* CONFIG_SYS_POST_WORD_ADDR */
+
+static inline ulong post_word_load (void)
+{
+ return in_le32((volatile void *)(_POST_WORD_ADDR));
+}
+
+static inline void post_word_store (ulong value)
+{
+ out_le32((volatile void *)(_POST_WORD_ADDR), value);
+}
+#endif /* defined (CONFIG_POST) || defined(CONFIG_LOGBUFFER) */
+#endif /* __ASSEMBLY__ */
+
#ifdef CONFIG_POST
#define POST_POWERON 0x01 /* test runs on power-on booting */
@@ -40,7 +95,7 @@
#define POST_RAM 0x0200 /* test runs in RAM */
#define POST_MANUAL 0x0400 /* test runs on diag command */
#define POST_REBOOT 0x0800 /* test may cause rebooting */
-#define POST_PREREL 0x1000 /* test runs before relocation */
+#define POST_PREREL 0x1000 /* test runs before relocation */
#define POST_CRITICAL 0x2000 /* Use failbootcmd if test failed */
#define POST_STOP 0x4000 /* Interrupt POST sequence on fail */