x86: Correct spi node alias
With recent changes spi node was moved to a place as a subnode under
pch, so update the alias to refer to its correct place as well.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index d148d6e..5807203 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -11,7 +11,7 @@
compatible = "google,link", "intel,celeron-ivybridge";
aliases {
- spi0 = "/pci/pch/spi";
+ spi0 = &spi;
usb0 = &usb_0;
usb1 = &usb_1;
};
@@ -252,7 +252,7 @@
/* Enable EC SMI source */
intel,alt-gp-smi-enable = <0x0100>;
- spi {
+ spi: spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich-spi";