commit 83bb3215df36ba1bd694dbc64225f36962f71653
author Ye.Li <B37916@freescale.com> Wed Nov 12 14:02:05 2014 +0800
committer Stefano Babic <sbabic@denx.de> Thu Nov 13 16:23:55 2014 +0100
tree 432c4d67753d82a9aa167c5b986789cef276db6d
parent 610efbe0c5d773a375a979ba864e275903b7a746

imx: mx6q/dlsabreauto: And NAND flash support

The i.MX6Q/DL sabreauto board has one NAND socket, set the
CONFIG_NAND_MXS and relevant NAND configurations to enable the
MXS NAND flash driver.
Add board level codes to set IOMUX and clock for GPMI-NAND and
BCH module.

Signed-off-by: Ye.Li <B37916@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>

include/configs/mx6qsabreauto.h

diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index 235dd6d..3f1c88e 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -48,4 +48,20 @@
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_SPEED		100000
 
+/* NAND flash command */
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NAND_TRIMFFS
+
+/* NAND stuff */
+#define CONFIG_NAND_MXS
+#define CONFIG_SYS_MAX_NAND_DEVICE     1
+#define CONFIG_SYS_NAND_BASE           0x40000000
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+
+/* DMA stuff, needed for GPMI/MXS NAND support */
+#define CONFIG_APBH_DMA
+#define CONFIG_APBH_DMA_BURST
+#define CONFIG_APBH_DMA_BURST8
+
 #endif                         /* __MX6QSABREAUTO_CONFIG_H */