Merge with /home/mk/git/u-boot-generic_ohci#generic_ohci
diff --git a/board/trab/auto_update.c b/board/trab/auto_update.c
index d2c8d44..7684499 100644
--- a/board/trab/auto_update.c
+++ b/board/trab/auto_update.c
@@ -34,7 +34,7 @@
#ifdef CONFIG_AUTO_UPDATE
-#ifndef CONFIG_USB_OHCI
+#ifndef CONFIG_USB_OHCI_NEW
#error "must define CONFIG_USB_OHCI"
#endif
diff --git a/cpu/arm920t/at91rm9200/usb.c b/cpu/arm920t/at91rm9200/usb.c
index 98e3cdd..366262e 100644
--- a/cpu/arm920t/at91rm9200/usb.c
+++ b/cpu/arm920t/at91rm9200/usb.c
@@ -23,7 +23,7 @@
#include <common.h>
-#if defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT)
+#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
# ifdef CONFIG_AT91RM9200
#include <asm/arch/hardware.h>
diff --git a/cpu/arm920t/s3c24x0/usb.c b/cpu/arm920t/s3c24x0/usb.c
index 4bc7961..ef5d5bf 100644
--- a/cpu/arm920t/s3c24x0/usb.c
+++ b/cpu/arm920t/s3c24x0/usb.c
@@ -23,7 +23,7 @@
#include <common.h>
-#if defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT)
+#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
# if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
#if defined(CONFIG_S3C2400)
diff --git a/cpu/mpc5xxx/Makefile b/cpu/mpc5xxx/Makefile
index 235adb7..312b0bf 100644
--- a/cpu/mpc5xxx/Makefile
+++ b/cpu/mpc5xxx/Makefile
@@ -28,7 +28,7 @@
START = start.o
SOBJS = io.o firmware_sc_task_bestcomm.impl.o firmware_sc_task.impl.o
COBJS = i2c.o traps.o cpu.o cpu_init.o fec.o ide.o interrupts.o \
- loadtask.o pci_mpc5200.o serial.o speed.o usb_ohci.o
+ loadtask.o pci_mpc5200.o serial.o speed.o usb_ohci.o usb.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/ppc4xx/Makefile b/cpu/ppc4xx/Makefile
index baecf70..87c6230 100644
--- a/cpu/ppc4xx/Makefile
+++ b/cpu/ppc4xx/Makefile
@@ -27,12 +27,11 @@
START = start.o resetvec.o kgdb.o
SOBJS = dcr.o
-COBJS = 405gp_pci.o 4xx_enet.o \
+COBJS = 405gp_pci.o 440spe_pcie.o 4xx_enet.o \
bedbug_405.o commproc.o \
cpu.o cpu_init.o i2c.o interrupts.o \
miiphy.o ndfc.o sdram.o serial.o \
- spd_sdram.o speed.o traps.o usb_ohci.o usbdev.o \
- 440spe_pcie.o
+ spd_sdram.o speed.o traps.o usb_ohci.o usbdev.o usb.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/pxa/usb.c b/cpu/pxa/usb.c
index bff5bfb..5d273cb 100644
--- a/cpu/pxa/usb.c
+++ b/cpu/pxa/usb.c
@@ -23,7 +23,7 @@
#include <common.h>
-#if defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT)
+#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
# ifdef CONFIG_CPU_MONAHANS
#include <asm/arch/pxa-regs.h>
diff --git a/doc/README.generic_usb_ohci b/doc/README.generic_usb_ohci
new file mode 100644
index 0000000..017c69a
--- /dev/null
+++ b/doc/README.generic_usb_ohci
@@ -0,0 +1,43 @@
+Notes on the the generic USB-OHCI driver
+========================================
+
+This driver (drivers/usb_ohci.[ch]) is the result of the merge of
+various existing OHCI drivers that were basically identical beside
+cpu/board dependant initalization. This initalization has been moved
+into cpu/board directories and are called via the hooks below.
+
+Configuration options
+----------------------
+
+CONFIG_USB_OHCI_NEW: enable the new OHCI driver
+
+CFG_USB_OHCI_BOARD_INIT: call the board dependant hooks:
+
+ - extern int usb_board_init(void);
+ - extern int usb_board_stop(void);
+ - extern int usb_cpu_init_fail(void);
+
+CFG_USB_OHCI_CPU_INIT: call the cpu dependant hooks:
+
+ - extern int usb_cpu_init(void);
+ - extern int usb_cpu_stop(void);
+ - extern int usb_cpu_init_fail(void);
+
+CFG_USB_OHCI_REGS_BASE: defines the base address of the OHCI registers
+
+CFG_USB_OHCI_SLOT_NAME: slot name
+
+CFG_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the root hub.
+
+
+Endianness issues
+------------------
+
+The LITTLEENDIAN #define determines if the 'swap_16' and 'swap_32'
+macros do byte swapping or not. But some cpus OHCI-controllers such as
+ppc4xx and mpc5xxx operate in little endian mode, so some extra ifdefs
+were necessary to make this work.
+
+
+
+
diff --git a/drivers/usb_ohci.c b/drivers/usb_ohci.c
index 9b3ca12..c5e4c38 100644
--- a/drivers/usb_ohci.c
+++ b/drivers/usb_ohci.c
@@ -43,8 +43,9 @@
#include <common.h>
/* #include <pci.h> no PCI on the S3C24X0 */
-#ifdef CONFIG_USB_OHCI
+#ifdef CONFIG_USB_OHCI_NEW
+/* mk: are these really required? */
#if defined(CONFIG_S3C2400)
# include <s3c2400.h>
#elif defined(CONFIG_S3C2410)
@@ -53,21 +54,28 @@
# include <asm/arch/hardware.h>
#elif defined(CONFIG_CPU_MONAHANS)
# include <asm/arch/pxa-regs.h>
+#elif defined(CONFIG_MPC5200)
+# include <mpc5xxx.h>
#endif
#include <malloc.h>
#include <usb.h>
#include "usb_ohci.h"
-#undef S3C24X0_merge
+#define S3C24X0_merge
#if defined(CONFIG_ARM920T) || \
defined(CONFIG_S3C2400) || \
- defined(CONFIG_S3C2410)
+ defined(CONFIG_S3C2410) || \
+ defined(CONFIG_440EP) || \
+ defined(CONFIG_MPC5200)
# define OHCI_USE_NPS /* force NoPowerSwitching mode */
#endif
#undef OHCI_VERBOSE_DEBUG /* not always helpful */
+#undef DEBUG
+#undef SHOW_INFO
+#undef OHCI_FILL_TRACE
/* For initializing controller (mask in an HCFS mode too) */
#define OHCI_CONTROL_INIT \
@@ -92,8 +100,13 @@
#define info(format, arg...) do {} while(0)
#endif
-#define m16_swap(x) swap_16(x)
-#define m32_swap(x) swap_32(x)
+#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
+# define m16_swap(x) (x)
+# define m32_swap(x) (x)
+#else
+# define m16_swap(x) swap_16(x)
+# define m32_swap(x) swap_32(x)
+#endif
/* global ohci_t */
static ohci_t gohci;
@@ -520,7 +533,7 @@
if (ohci->ed_controltail == NULL) {
writel (ed, &ohci->regs->ed_controlhead);
} else {
- ohci->ed_controltail->hwNextED = m32_swap (ed);
+ ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
}
ed->ed_prev = ohci->ed_controltail;
if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
@@ -536,7 +549,7 @@
if (ohci->ed_bulktail == NULL) {
writel (ed, &ohci->regs->ed_bulkhead);
} else {
- ohci->ed_bulktail->hwNextED = m32_swap (ed);
+ ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
}
ed->ed_prev = ohci->ed_bulktail;
if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
@@ -557,8 +570,10 @@
* the link from the ed still points to another operational ed or 0
* so the HC can eventually finish the processing of the unlinked ed */
-static int ep_unlink (ohci_t *ohci, ed_t *ed)
+static int ep_unlink (ohci_t *ohci, ed_t *edi)
{
+ volatile ed_t *ed = edi;
+
ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
switch (ed->type) {
@@ -630,7 +645,7 @@
ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
/* dummy td; end of td list for ed */
td = td_alloc (usb_dev);
- ed->hwTailP = m32_swap (td);
+ ed->hwTailP = m32_swap ((unsigned long)td);
ed->hwHeadP = ed->hwTailP;
ed->state = ED_UNLINK;
ed->type = usb_pipetype (pipe);
@@ -688,12 +703,12 @@
data = 0;
td->hwINFO = m32_swap (info);
- td->hwCBP = m32_swap (data);
+ td->hwCBP = m32_swap ((unsigned long)data);
if (data)
- td->hwBE = m32_swap (data + len - 1);
+ td->hwBE = m32_swap ((unsigned long)(data + len - 1));
else
td->hwBE = 0;
- td->hwNextTD = m32_swap (td_pt);
+ td->hwNextTD = m32_swap ((unsigned long)td_pt);
#ifndef S3C24X0_merge
td->hwPSW [0] = m16_swap (((__u32)data & 0x0FFF) | 0xE000);
#endif
@@ -825,6 +840,9 @@
} else
td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
}
+#ifdef CONFIG_MPC5200
+ td_list->hwNextTD = 0;
+#endif
}
td_list->next_dl_td = td_rev;
@@ -867,7 +885,12 @@
/* see if this done list makes for all TD's of current URB,
* and mark the URB finished if so */
if (++(lurb_priv->td_cnt) == lurb_priv->length) {
+#if 1
+ if ((ed->state & (ED_OPER | ED_UNLINK)) &&
+ (lurb_priv->state != URB_DEL))
+#else
if ((ed->state & (ED_OPER | ED_UNLINK)))
+#endif
urb_finished = 1;
else
dbg("dl_done_list: strange.., ED state %x, ed->state\n");
@@ -1060,9 +1083,15 @@
}
bmRType_bReq = cmd->requesttype | (cmd->request << 8);
+#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
+ wValue = __swap_16(cmd->value);
+ wIndex = __swap_16(cmd->index);
+ wLength = __swap_16(cmd->length);
+#else
wValue = m16_swap (cmd->value);
wIndex = m16_swap (cmd->index);
wLength = m16_swap (cmd->length);
+#endif /* CONFIG_440EP || CONFIG_MPC5200 */
info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
@@ -1076,6 +1105,20 @@
RH_OTHER | RH_CLASS almost ever means HUB_PORT here
*/
+#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
+ case RH_GET_STATUS:
+ *(__u16 *) data_buf = __swap_16(1); OK (2);
+ case RH_GET_STATUS | RH_INTERFACE:
+ *(__u16 *) data_buf = __swap_16(0); OK (2);
+ case RH_GET_STATUS | RH_ENDPOINT:
+ *(__u16 *) data_buf = __swap_16(0); OK (2);
+ case RH_GET_STATUS | RH_CLASS:
+ *(__u32 *) data_buf = __swap_32(
+ RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
+ OK (4);
+ case RH_GET_STATUS | RH_OTHER | RH_CLASS:
+ *(__u32 *) data_buf = __swap_32(RD_RH_PORTSTAT); OK (4);
+#else
case RH_GET_STATUS:
*(__u16 *) data_buf = m16_swap (1); OK (2);
case RH_GET_STATUS | RH_INTERFACE:
@@ -1088,6 +1131,7 @@
OK (4);
case RH_GET_STATUS | RH_OTHER | RH_CLASS:
*(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
+#endif /* CONFIG_440EP || CONFIG_MPC5200 */
case RH_CLEAR_FEATURE | RH_ENDPOINT:
switch (wValue) {
@@ -1286,8 +1330,10 @@
return -1;
}
+#if 0
wait_ms(10);
/* ohci_dump_status(&gohci); */
+#endif
/* allow more time for a BULK device to react - some are slow */
#define BULK_TO 5000 /* timeout in milliseconds */
@@ -1329,6 +1375,7 @@
err("CTL:TIMEOUT ");
#ifdef S3C24X0_merge
dbg("submit_common_msg: TO status %x\n", stat);
+ stat = USB_ST_CRC_ERR;
urb_finished = 1;
#endif
stat = USB_ST_CRC_ERR;
@@ -1448,7 +1495,8 @@
readl(&ohci->regs->control));
/* Reset USB (needed by some controllers) */
- writel (0, &ohci->regs->control);
+ ohci->hc_control = 0;
+ writel (ohci->hc_control, &ohci->regs->control);
/* HC Reset requires max 10 us delay */
writel (OHCI_HCR, &ohci->regs->cmdstatus);
@@ -1746,5 +1794,4 @@
return 0;
}
-
-#endif /* CONFIG_USB_OHCI */
+#endif /* CONFIG_USB_OHCI_NEW */
diff --git a/drivers/usb_ohci.h b/drivers/usb_ohci.h
index 68dd4ec..95fbc44 100644
--- a/drivers/usb_ohci.h
+++ b/drivers/usb_ohci.h
@@ -113,7 +113,9 @@
__u32 hwNextTD; /* Next TD Pointer */
__u32 hwBE; /* Memory Buffer End Pointer */
+/* #ifndef CONFIG_MPC5200 /\* this seems wrong *\/ */
__u16 hwPSW[MAXPSW];
+/* #endif */
__u8 unused;
__u8 index;
struct ed *ed;
@@ -137,8 +139,13 @@
#define NUM_INTS 32 /* part of the OHCI standard */
struct ohci_hcca {
__u32 int_table[NUM_INTS]; /* Interrupt ED table */
+#if defined(CONFIG_MPC5200)
+ __u16 pad1; /* set to 0 on each frame_no change */
+ __u16 frame_no; /* current frame number */
+#else
__u16 frame_no; /* current frame number */
__u16 pad1; /* set to 0 on each frame_no change */
+#endif
__u32 done_head; /* info returned for an interrupt */
u8 reserved_for_hc[116];
} __attribute((aligned(256)));
@@ -147,7 +154,9 @@
/*
* Maximum number of root hub ports.
*/
-#define MAX_ROOT_PORTS 3 /* maximum OHCI root hub ports */
+#ifndef CFG_USB_OHCI_MAX_ROOT_PORTS
+# error "CFG_USB_OHCI_MAX_ROOT_PORTS undefined!"
+#endif
/*
* This is the structure of the OHCI controller's memory mapped I/O
@@ -181,7 +190,7 @@
__u32 a;
__u32 b;
__u32 status;
- __u32 portstatus[MAX_ROOT_PORTS];
+ __u32 portstatus[CFG_USB_OHCI_MAX_ROOT_PORTS];
} roothub;
} __attribute((aligned(32)));
diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h
index 1152f83..8753b9f 100644
--- a/include/configs/IceCube.h
+++ b/include/configs/IceCube.h
@@ -94,9 +94,16 @@
/* USB */
#if 1
-#define CONFIG_USB_OHCI
+#define CONFIG_USB_OHCI_NEW
#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
#define CONFIG_USB_STORAGE
+
+#undef CFG_USB_OHCI_BOARD_INIT
+#define CFG_USB_OHCI_CPU_INIT
+#define CFG_USB_OHCI_REGS_BASE MPC5XXX_USB
+#define CFG_USB_OHCI_SLOT_NAME "mpc5200"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
+
#else
#define ADD_USB_CMD 0
#endif
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index 08674ca..2c34ce0 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -146,9 +146,16 @@
/* USB */
#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
-#define CONFIG_USB_OHCI
+#define CONFIG_USB_OHCI_NEW
#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
#define CONFIG_USB_STORAGE
+
+#undef CFG_USB_OHCI_BOARD_INIT
+#define CFG_USB_OHCI_CPU_INIT
+#define CFG_USB_OHCI_REGS_BASE MPC5XXX_USB
+#define CFG_USB_OHCI_SLOT_NAME "mpc5200"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
+
#else
#define ADD_USB_CMD 0
#endif
diff --git a/include/configs/delta.h b/include/configs/delta.h
index fea821a..4038f21 100644
--- a/include/configs/delta.h
+++ b/include/configs/delta.h
@@ -103,7 +103,7 @@
#endif
/* USB */
-#define CONFIG_USB_OHCI 1
+#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_DOS_PARTITION 1
@@ -111,6 +111,7 @@
#define CFG_USB_OHCI_CPU_INIT 1
#define CFG_USB_OHCI_REGS_BASE OHCI_REGS_BASE
#define CFG_USB_OHCI_SLOT_NAME "delta"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 3
#define LITTLEENDIAN 1 /* used by usb_ohci.c */
diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h
index edb20f8..2cf78a3 100644
--- a/include/configs/mp2usb.h
+++ b/include/configs/mp2usb.h
@@ -101,7 +101,7 @@
#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
-#define CONFIG_USB_OHCI 1
+#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_USB_KEYBOARD 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_DOS_PARTITION 1
@@ -111,6 +111,7 @@
#define CFG_USB_OHCI_CPU_INIT 1
#define CFG_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE
#define CFG_USB_OHCI_SLOT_NAME "at91rm9200"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
#undef CONFIG_HARD_I2C
diff --git a/include/configs/trab.h b/include/configs/trab.h
index ae97947..acf86d0 100644
--- a/include/configs/trab.h
+++ b/include/configs/trab.h
@@ -80,7 +80,7 @@
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
/* USB stuff */
-#define CONFIG_USB_OHCI 1
+#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_DOS_PARTITION 1
@@ -88,6 +88,7 @@
#define CFG_USB_OHCI_CPU_INIT 1
#define CFG_USB_OHCI_REGS_BASE S3C24X0_USB_HOST_BASE
#define CFG_USB_OHCI_SLOT_NAME "s3c2400"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
/*
* Size of malloc() pool
diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h
index 3d7b4a2..9f98500 100644
--- a/include/configs/yosemite.h
+++ b/include/configs/yosemite.h
@@ -214,9 +214,15 @@
#ifdef CONFIG_440EP
/* USB */
-#define CONFIG_USB_OHCI
+#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_STORAGE
+#undef CFG_USB_OHCI_BOARD_INIT
+#define CFG_USB_OHCI_CPU_INIT 1
+#define CFG_USB_OHCI_REGS_BASE (CFG_PERIPHERAL_BASE | 0x1000)
+#define CFG_USB_OHCI_SLOT_NAME "ppc440"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
+
/*Comment this out to enable USB 1.1 device*/
#define USB_2_0_DEVICE
#endif /*CONFIG_440EP*/
diff --git a/include/usb.h b/include/usb.h
index bf71554..419a7e3 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -169,7 +169,7 @@
* this is how the lowlevel part communicate with the outer world
*/
-#if defined(CONFIG_USB_UHCI) || defined(CONFIG_USB_OHCI) || defined (CONFIG_USB_SL811HS)
+#if defined(CONFIG_USB_UHCI) || defined(CONFIG_USB_OHCI) || defined (CONFIG_USB_SL811HS) || defined(CONFIG_USB_OHCI_NEW)
int usb_lowlevel_init(void);
int usb_lowlevel_stop(void);
int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len);
@@ -230,16 +230,12 @@
/* big endian -> little endian conversion */
/* some CPUs are already little endian e.g. the ARM920T */
-#ifdef LITTLEENDIAN
-#define swap_16(x) ((unsigned short)(x))
-#define swap_32(x) ((unsigned long)(x))
-#else
-#define swap_16(x) \
+#define __swap_16(x) \
({ unsigned short x_ = (unsigned short)x; \
(unsigned short)( \
((x_ & 0x00FFU) << 8) | ((x_ & 0xFF00U) >> 8) ); \
})
-#define swap_32(x) \
+#define __swap_32(x) \
({ unsigned long x_ = (unsigned long)x; \
(unsigned long)( \
((x_ & 0x000000FFUL) << 24) | \
@@ -247,6 +243,13 @@
((x_ & 0x00FF0000UL) >> 8) | \
((x_ & 0xFF000000UL) >> 24) ); \
})
+
+#ifdef LITTLEENDIAN
+# define swap_16(x) (x)
+# define swap_32(x) (x)
+#else
+# define swap_16(x) __swap_16(x)
+# define swap_32(x) __swap_32(x)
#endif /* LITTLEENDIAN */
/*