dm: cache: Create a uclass for cache
The cache UCLASS will be used for configure settings that can be found
in a CPU's L2 cache controller.
Add a uclass and a test for cache.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
diff --git a/drivers/Kconfig b/drivers/Kconfig
index e6702ec..96ff4f5 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -14,6 +14,8 @@
source "drivers/bootcount/Kconfig"
+source "drivers/cache/Kconfig"
+
source "drivers/clk/Kconfig"
source "drivers/cpu/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index a7bba3e..0a00096 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -77,6 +77,7 @@
obj-y += block/
obj-y += board/
obj-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount/
+obj-y += cache/
obj-$(CONFIG_CPU) += cpu/
obj-y += crypto/
obj-$(CONFIG_FASTBOOT) += fastboot/
diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig
new file mode 100644
index 0000000..8b7c9c7
--- /dev/null
+++ b/drivers/cache/Kconfig
@@ -0,0 +1,16 @@
+#
+# Cache controllers
+#
+
+menu "Cache Controller drivers"
+
+config CACHE
+ bool "Enable Driver Model for Cache controllers"
+ depends on DM
+ help
+ Enable driver model for cache controllers that are found on
+ most CPU's. Cache is memory that the CPU can access directly and
+ is usually located on the same chip. This uclass can be used for
+ configuring settings that be found from a device tree file.
+
+endmenu
diff --git a/drivers/cache/Makefile b/drivers/cache/Makefile
new file mode 100644
index 0000000..2ba6806
--- /dev/null
+++ b/drivers/cache/Makefile
@@ -0,0 +1,3 @@
+
+obj-$(CONFIG_CACHE) += cache-uclass.o
+obj-$(CONFIG_SANDBOX) += sandbox_cache.o
diff --git a/drivers/cache/cache-uclass.c b/drivers/cache/cache-uclass.c
new file mode 100644
index 0000000..97ce024
--- /dev/null
+++ b/drivers/cache/cache-uclass.c
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+#include <cache.h>
+#include <dm.h>
+
+int cache_get_info(struct udevice *dev, struct cache_info *info)
+{
+ struct cache_ops *ops = cache_get_ops(dev);
+
+ if (!ops->get_info)
+ return -ENOSYS;
+
+ return ops->get_info(dev, info);
+}
+
+UCLASS_DRIVER(cache) = {
+ .id = UCLASS_CACHE,
+ .name = "cache",
+ .post_bind = dm_scan_fdt_dev,
+};
diff --git a/drivers/cache/sandbox_cache.c b/drivers/cache/sandbox_cache.c
new file mode 100644
index 0000000..14cc6b0
--- /dev/null
+++ b/drivers/cache/sandbox_cache.c
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+#include <cache.h>
+#include <dm.h>
+#include <errno.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int sandbox_get_info(struct udevice *dev, struct cache_info *info)
+{
+ info->base = 0x11223344;
+
+ return 0;
+}
+
+static const struct cache_ops sandbox_cache_ops = {
+ .get_info = sandbox_get_info,
+};
+
+static const struct udevice_id sandbox_cache_ids[] = {
+ { .compatible = "sandbox,cache" },
+ { }
+};
+
+U_BOOT_DRIVER(cache_sandbox) = {
+ .name = "cache_sandbox",
+ .id = UCLASS_CACHE,
+ .of_match = sandbox_cache_ids,
+ .ops = &sandbox_cache_ops,
+};