commit 852467de92c38c6c5b9338dd75989e306461dd08
author Sergei Antonov <saproj@gmail.com> Sun Jul 30 21:17:09 2023 +0300
committer Tom Rini <trini@konsulko.com> Mon Aug 14 17:55:53 2023 -0400
tree 9133ed8852e8324d268829c8f554df0368c625b8
parent 84032b6759024337a81ae5d8e23a39110381743b

pci: ftpci100: add new driver implementation

Add a new DM driver supporting FTPCI100 IP used in SoC designs.
This implementation is not based on the old non-DM ftpci100 code
dropped from U-Boot.

Enable the driver in sandbox_defconfig to test compilability.

Signed-off-by: Sergei Antonov <saproj@gmail.com>

drivers/pci/pci_ftpci100.c

diff --git a/drivers/pci/pci_ftpci100.c b/drivers/pci/pci_ftpci100.c
new file mode 100644
index 0000000..a177544
--- /dev/null
+++ b/drivers/pci/pci_ftpci100.c
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include <common.h>
+#include <pci.h>
+#include <dm.h>
+#include <asm/io.h>
+
+struct ftpci100_data {
+	void *reg_base;
+};
+
+/* AHB Control Registers */
+struct ftpci100_ahbc {
+	u32 iosize;	/* 0x00 - I/O Space Size Signal */
+	u32 prot;	/* 0x04 - AHB Protection */
+	u32 rsved[8];	/* 0x08-0x24 - Reserved */
+	u32 conf;	/* 0x28 - PCI Configuration */
+	u32 data;	/* 0x2c - PCI Configuration DATA */
+};
+
+static int ftpci100_read_config(const struct udevice *dev, pci_dev_t bdf,
+				uint offset, ulong *valuep,
+				enum pci_size_t size)
+{
+	struct ftpci100_data *priv = dev_get_priv(dev);
+	struct ftpci100_ahbc *regs = priv->reg_base;
+	u32 data;
+
+	out_le32(&regs->conf, PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset));
+	data = in_le32(&regs->data);
+	*valuep = pci_conv_32_to_size(data, offset, size);
+
+	return 0;
+}
+
+static int ftpci100_write_config(struct udevice *dev, pci_dev_t bdf,
+				 uint offset, ulong value,
+				 enum pci_size_t size)
+{
+	struct ftpci100_data *priv = dev_get_priv(dev);
+	struct ftpci100_ahbc *regs = priv->reg_base;
+	u32 data;
+
+	out_le32(&regs->conf, PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset));
+
+	if (size == PCI_SIZE_32) {
+		data = value;
+	} else {
+		u32 old = in_le32(&regs->data);
+
+		data = pci_conv_size_to_32(old, value, offset, size);
+	}
+
+	out_le32(&regs->data, data);
+
+	return 0;
+}
+
+static int ftpci100_probe(struct udevice *dev)
+{
+	struct ftpci100_data *priv = dev_get_priv(dev);
+	struct pci_region *io, *mem;
+	int count;
+
+	count = pci_get_regions(dev, &io, &mem, NULL);
+	if (count != 2) {
+		printf("%s: wrong count of regions: %d != 2\n", dev->name, count);
+		return -EINVAL;
+	}
+
+	priv->reg_base = phys_to_virt(io->phys_start);
+	if (!priv->reg_base)
+		return -EINVAL;
+
+	return 0;
+}
+
+static const struct dm_pci_ops ftpci100_ops = {
+	.read_config	= ftpci100_read_config,
+	.write_config	= ftpci100_write_config,
+};
+
+static const struct udevice_id ftpci100_ids[] = {
+	{ .compatible = "faraday,ftpci100" },
+	{ }
+};
+
+U_BOOT_DRIVER(ftpci100_pci) = {
+	.name		= "ftpci100_pci",
+	.id		= UCLASS_PCI,
+	.of_match	= ftpci100_ids,
+	.ops		= &ftpci100_ops,
+	.probe		= ftpci100_probe,
+	.priv_auto	= sizeof(struct ftpci100_data),
+};