mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND

Add more clarity by changing the Kconfig entry name.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[trini: Re-run migration, update a few more cases]
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
diff --git a/board/BuR/brppt1/board.c b/board/BuR/brppt1/board.c
index dd9649c..8aa03ea 100644
--- a/board/BuR/brppt1/board.c
+++ b/board/BuR/brppt1/board.c
@@ -150,7 +150,7 @@
 	hw_watchdog_init();
 #endif
 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 	gpmc_init();
 #endif
 	return 0;
diff --git a/board/BuR/brppt1/mux.c b/board/BuR/brppt1/mux.c
index 87eee70..b863d37 100644
--- a/board/BuR/brppt1/mux.c
+++ b/board/BuR/brppt1/mux.c
@@ -118,7 +118,7 @@
 	{OFFSET(gpmc_be1n), (MODE(1) | RXACTIVE)},/* MII1_COL */
 	{-1},
 };
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 static struct module_pin_mux nand_pin_mux[] = {
 	{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD0 */
 	{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD1 */
@@ -180,7 +180,7 @@
 	{OFFSET(mcasp0_axr0),  (MODE(7) | PULLUDDIS) },
 	/* GPIO3_17 (MCASP0_AHCLKR) - ETH2_LEDY */
 	{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS) },
-#ifndef CONFIG_NAND
+#ifndef CONFIG_MTD_RAW_NAND
 	/* GPIO2_3 - NAND_OE */
 	{OFFSET(gpmc_oen_ren), (MODE(7) | PULLDOWN_EN | RXACTIVE)},
 	/* GPIO2_4 - NAND_WEN */
@@ -241,7 +241,7 @@
 	configure_module_pin_mux(i2c0_pin_mux);
 	configure_module_pin_mux(mii1_pin_mux);
 	configure_module_pin_mux(mii2_pin_mux);
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 	configure_module_pin_mux(nand_pin_mux);
 #elif defined(CONFIG_MMC)
 	configure_module_pin_mux(mmc1_pin_mux);
diff --git a/board/birdland/bav335x/board.c b/board/birdland/bav335x/board.c
index c946ea4..9eb851c 100644
--- a/board/birdland/bav335x/board.c
+++ b/board/birdland/bav335x/board.c
@@ -292,7 +292,7 @@
 #endif
 
 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
+#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
 	gpmc_init();
 #endif
 	return 0;
diff --git a/board/bosch/guardian/board.c b/board/bosch/guardian/board.c
index 072aa4e..32ebaf4 100644
--- a/board/bosch/guardian/board.c
+++ b/board/bosch/guardian/board.c
@@ -180,7 +180,7 @@
 
 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 	gpmc_init();
 #endif
 	return 0;
diff --git a/board/bosch/guardian/mux.c b/board/bosch/guardian/mux.c
index 20a1f25..9c81f29 100644
--- a/board/bosch/guardian/mux.c
+++ b/board/bosch/guardian/mux.c
@@ -39,7 +39,7 @@
 	{-1},
 };
 
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 static struct module_pin_mux nand_pin_mux[] = {
 	{OFFSET(gpmc_ad0),      (MODE(0) | PULLUDDIS | RXACTIVE)},
 	{OFFSET(gpmc_ad1),      (MODE(0) | PULLUDDIS | RXACTIVE)},
@@ -82,7 +82,7 @@
 
 void enable_board_pin_mux(void)
 {
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 	configure_module_pin_mux(nand_pin_mux);
 #endif
 	configure_module_pin_mux(guardian_interfaces_pin_mux);
diff --git a/board/bosch/shc/board.c b/board/bosch/shc/board.c
index 60f9c1c..440d02f 100644
--- a/board/bosch/shc/board.c
+++ b/board/bosch/shc/board.c
@@ -444,7 +444,7 @@
 		puts("EEPROM Content Invalid.\n");
 
 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
+#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
 	gpmc_init();
 #endif
 	shc_request_gpio();
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index 25e80c8..5792a56 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -221,7 +221,7 @@
 	else
 		config_board_mux(MUX_TYPE_SDHC);
 
-#if defined(CONFIG_NAND) && defined(CONFIG_FSL_QSPI)
+#if defined(CONFIG_MTD_RAW_NAND) && defined(CONFIG_FSL_QSPI)
 	val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4);
 
 	if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3))
diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c
index d578a0b..ab07c1f 100644
--- a/board/freescale/t102xrdb/t102xrdb.c
+++ b/board/freescale/t102xrdb/t102xrdb.c
@@ -76,7 +76,7 @@
 		printf("NOR vBank%d\n", reg);
 	}
 #elif defined(CONFIG_TARGET_T1023RDB)
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 	puts("NAND\n");
 #else
 	printf("NOR vBank%d\n", t1023rdb_ctrl(I2C_GET_BANK));
diff --git a/board/imgtec/ci20/ci20.c b/board/imgtec/ci20/ci20.c
index 5368b67..170ea12 100644
--- a/board/imgtec/ci20/ci20.c
+++ b/board/imgtec/ci20/ci20.c
@@ -42,7 +42,7 @@
 {
 	void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
 
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 	/* setup pins (some already setup for NAND) */
 	writel(0x04030000, gpio_regs + GPIO_PXINTC(0));
 	writel(0x04030000, gpio_regs + GPIO_PXMASKC(0));
diff --git a/board/phytec/pcm051/mux.c b/board/phytec/pcm051/mux.c
index 6e9c3d2..9bca8ea 100644
--- a/board/phytec/pcm051/mux.c
+++ b/board/phytec/pcm051/mux.c
@@ -82,7 +82,7 @@
 	{-1},
 };
 
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 static struct module_pin_mux nand_pin_mux[] = {
 	{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD0 */
 	{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD1 */
@@ -118,7 +118,7 @@
 	configure_module_pin_mux(rmii1_pin_mux);
 	configure_module_pin_mux(mmc0_pin_mux);
 	configure_module_pin_mux(cbmux_pin_mux);
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 	configure_module_pin_mux(nand_pin_mux);
 #endif
 #ifdef CONFIG_SPI
diff --git a/board/phytec/phycore_am335x_r2/mux.c b/board/phytec/phycore_am335x_r2/mux.c
index 5fd452e..7091c98 100644
--- a/board/phytec/phycore_am335x_r2/mux.c
+++ b/board/phytec/phycore_am335x_r2/mux.c
@@ -72,7 +72,7 @@
 	{-1},
 };
 
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 static struct module_pin_mux nand_pin_mux[] = {
 	{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD0 */
 	{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD1 */
@@ -108,7 +108,7 @@
 	configure_module_pin_mux(rmii1_pin_mux);
 	configure_module_pin_mux(mmc0_pin_mux);
 	configure_module_pin_mux(cbmux_pin_mux);
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 	configure_module_pin_mux(nand_pin_mux);
 #endif
 #ifdef CONFIG_SPI
diff --git a/board/siemens/pxm2/mux.c b/board/siemens/pxm2/mux.c
index 9b69b6f..2f35bb4 100644
--- a/board/siemens/pxm2/mux.c
+++ b/board/siemens/pxm2/mux.c
@@ -26,7 +26,7 @@
 	{-1},
 };
 
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 static struct module_pin_mux nand_pin_mux[] = {
 	{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD0 */
 	{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD1 */
@@ -169,7 +169,7 @@
 {
 	configure_module_pin_mux(uart0_pin_mux);
 	configure_module_pin_mux(i2c1_pin_mux);
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 	configure_module_pin_mux(nand_pin_mux);
 #endif
 #ifndef CONFIG_NO_ETH
diff --git a/board/sunxi/README.nand b/board/sunxi/README.nand
index 98ebe5f..0e97316 100644
--- a/board/sunxi/README.nand
+++ b/board/sunxi/README.nand
@@ -21,7 +21,7 @@
 SPL image that is ready to be programmed directly embedding the ECCs,
 randomized, and with the necessary bits needed to reduce the number of
 bitflips. The U-Boot build system, when configured for the NAND (with
-CONFIG_NAND=y) will also generate the image sunxi-spl-with-ecc.bin
+CONFIG_MTD_RAW_NAND=y) will also generate the image sunxi-spl-with-ecc.bin
 that will have been generated by that tool.
 
 In order to flash your U-Boot image onto a board, assuming that the
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 46b95c7..3d7f738 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -710,7 +710,7 @@
 #endif
 
 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
+#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
 	gpmc_init();
 #endif
 
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 6e1ede3..6fb2c00 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -195,7 +195,7 @@
 	{-1},
 };
 
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 static struct module_pin_mux nand_pin_mux[] = {
 	{OFFSET(gpmc_ad0),	(MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0  */
 	{OFFSET(gpmc_ad1),	(MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1  */
@@ -360,7 +360,7 @@
 		/* Beaglebone pinmux */
 		configure_module_pin_mux(mii1_pin_mux);
 		configure_module_pin_mux(mmc0_pin_mux);
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
 		configure_module_pin_mux(nand_pin_mux);
 #elif defined(CONFIG_NOR)
 		configure_module_pin_mux(bone_norcape_pin_mux);
@@ -376,7 +376,7 @@
 		if (profile & ~PROFILE_2)
 			configure_module_pin_mux(i2c1_pin_mux);
 		/* Profiles 2 & 3 don't have NAND */
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 		if (profile & ~(PROFILE_2 | PROFILE_3))
 			configure_module_pin_mux(nand_pin_mux);
 #endif
@@ -404,7 +404,7 @@
 		}
 		/* Beaglebone LT pinmux */
 		configure_module_pin_mux(mmc0_pin_mux);
-#if defined(CONFIG_NAND) && defined(CONFIG_EMMC_BOOT)
+#if defined(CONFIG_MTD_RAW_NAND) && defined(CONFIG_EMMC_BOOT)
 		configure_module_pin_mux(nand_pin_mux);
 #elif defined(CONFIG_NOR) && defined(CONFIG_EMMC_BOOT)
 		configure_module_pin_mux(bone_norcape_pin_mux);
diff --git a/board/ti/am43xx/mux.c b/board/ti/am43xx/mux.c
index a61987e..f59e93a 100644
--- a/board/ti/am43xx/mux.c
+++ b/board/ti/am43xx/mux.c
@@ -73,7 +73,7 @@
 	{-1},
 };
 
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
 static struct module_pin_mux nand_pin_mux[] = {
 	{OFFSET(gpmc_ad0),	(MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */
 	{OFFSET(gpmc_ad1),	(MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */
@@ -128,18 +128,18 @@
 	if (board_is_evm()) {
 		configure_module_pin_mux(gpio5_7_pin_mux);
 		configure_module_pin_mux(rgmii1_pin_mux);
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
 		configure_module_pin_mux(nand_pin_mux);
 #endif
 	} else if (board_is_sk() || board_is_idk()) {
 		configure_module_pin_mux(rgmii1_pin_mux);
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
 		printf("Error: NAND flash not present on this board\n");
 #endif
 		configure_module_pin_mux(qspi_pin_mux);
 	} else if (board_is_eposevm()) {
 		configure_module_pin_mux(rmii1_pin_mux);
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
 		configure_module_pin_mux(nand_pin_mux);
 #else
 		configure_module_pin_mux(qspi_pin_mux);
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 04e9b89..79b8363 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -784,7 +784,7 @@
 		     early_padconf, ARRAY_SIZE(early_padconf));
 }
 
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
 static int nand_sw_detect(void)
 {
 	int rc;
diff --git a/board/ti/ti816x/evm.c b/board/ti/ti816x/evm.c
index 8f7b591..3896ebb 100644
--- a/board/ti/ti816x/evm.c
+++ b/board/ti/ti816x/evm.c
@@ -25,7 +25,7 @@
 int board_init(void)
 {
 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
 	gpmc_init();
 #endif
 	return 0;
diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c
index 02ea1c0..c76502c 100644
--- a/board/vscom/baltos/board.c
+++ b/board/vscom/baltos/board.c
@@ -265,7 +265,7 @@
 #endif
 
 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
+#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
 	gpmc_init();
 #endif
 	return 0;
diff --git a/board/vscom/baltos/mux.c b/board/vscom/baltos/mux.c
index 9c5542e..e01899c 100644
--- a/board/vscom/baltos/mux.c
+++ b/board/vscom/baltos/mux.c
@@ -112,7 +112,7 @@
 	configure_module_pin_mux(rmii1_pin_mux);
 	configure_module_pin_mux(mmc0_pin_mux);
 
-#if defined(CONFIG_NAND)
+#if defined(CONFIG_MTD_RAW_NAND)
 	configure_module_pin_mux(nand_pin_mux);
 #endif
 }