board: ge: bx50v3: Enable CONFIG_DM_SPI, CONFIG_DM_SPI_FLASH
Use SPI flash device model, and remove SPI pin configuration code since
the pinctrl driver is used.
Signed-off-by: Ian Ray <ian.ray@ge.com>
diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts
index 0fff219..deaec63 100644
--- a/arch/arm/dts/imx6q-bx50v3.dts
+++ b/arch/arm/dts/imx6q-bx50v3.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include "imx6q.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "General Electric Bx50v3";
@@ -17,6 +18,16 @@
&iomuxc {
pinctrl-names = "default";
+ pinctrl_ecspi1: ecspi1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
+ /* SPI1 CS */
+ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
+ >;
+ };
+
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
@@ -60,3 +71,19 @@
&usdhc4 {
status = "disabled";
};
+
+/* SPI NOR */
+&ecspi1 {
+ cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi1>;
+ status = "okay";
+
+ flash: n25q032@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
+};