riscv: dts: starfive: Enable PCIe host controller
Enable and add pinctrl configuration for PCIe host controller.
Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
index b90e7f8..bf7fdb4 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
@@ -7,6 +7,7 @@
#include "jh7110.dtsi"
#include <dt-bindings/pinctrl/pinctrl-starfive-jh7110.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
serial0 = &uart0;
@@ -308,6 +309,16 @@
};
};
+&pcie0 {
+ reset-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>;
+ status = "disabled";
+};
+
+&pcie1 {
+ reset-gpios = <&sysgpio 28 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
&syscrg {
assigned-clocks = <&syscrg JH7110_SYSCLK_CPU_ROOT>,
<&syscrg JH7110_SYSCLK_BUS_ROOT>,