serial: msm: add debug UART
Introduce support for early debugging. This relies on the previous stage
bootloader to initialise the UART clocks, when running with U-Boot as
the primary bootloader this feature doesn't work. It will require a way
to configure the clocks before the driver model is available.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 26460c4..fbd351a 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -319,6 +319,14 @@
will need to provide parameters to make this work. The driver will
be available until the real driver-model serial is running.
+config DEBUG_UART_MSM
+ bool "Qualcomm QUP UART debug"
+ depends on ARCH_SNAPDRAGON
+ help
+ Select this to enable a debug UART using the serial_msm driver. You
+ will need to provide parameters to make this work. The driver will
+ be available until the real driver-model serial is running.
+
config DEBUG_UART_MSM_GENI
bool "Qualcomm snapdragon"
depends on ARCH_SNAPDRAGON
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
index f4d9631..44b93bd 100644
--- a/drivers/serial/serial_msm.c
+++ b/drivers/serial/serial_msm.c
@@ -252,3 +252,40 @@
.probe = msm_serial_probe,
.ops = &msm_serial_ops,
};
+
+#ifdef CONFIG_DEBUG_UART_MSM
+
+static struct msm_serial_data init_serial_data = {
+ .base = CONFIG_VAL(DEBUG_UART_BASE),
+ .clk_rate = 7372800,
+};
+
+#include <debug_uart.h>
+
+/* Uncomment to turn on UART clocks when debugging U-Boot as aboot on MSM8916 */
+//int apq8016_clk_init_uart(phys_addr_t gcc_base);
+
+static inline void _debug_uart_init(void)
+{
+ /* Uncomment to turn on UART clocks when debugging U-Boot as aboot on MSM8916 */
+ //apq8016_clk_init_uart(0x1800000);
+ uart_dm_init(&init_serial_data);
+}
+
+static inline void _debug_uart_putc(int ch)
+{
+ struct msm_serial_data *priv = &init_serial_data;
+
+ while (!(readl(priv->base + UARTDM_SR) & UARTDM_SR_TX_EMPTY) &&
+ !(readl(priv->base + UARTDM_ISR) & UARTDM_ISR_TX_READY))
+ ;
+
+ writel(UARTDM_CR_CMD_RESET_TX_READY, priv->base + UARTDM_CR);
+
+ writel(1, priv->base + UARTDM_NCF_TX);
+ writel(ch, priv->base + UARTDM_TF);
+}
+
+DEBUG_UART_FUNCS
+
+#endif