commit 923a662f2fb09aa67c1ec0de25474c218fad2690
author Simon Glass <sjg@chromium.org> Thu Dec 13 20:49:02 2012 +0000
committer Tom Rini <trini@ti.com> Mon Feb 04 09:05:44 2013 -0500
tree 0619dffdc10d04edd41fbc216e6d81608fd5aac1
parent 7273ccec61e26adef6149ddaf261217b30c4f8a9

ppc: Move fpga_state to arch_global_data

Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>

board/gdsys/405ex/405ex.c

diff --git a/board/gdsys/405ex/405ex.c b/board/gdsys/405ex/405ex.c
index 5766c0f..32e24c0 100644
--- a/board/gdsys/405ex/405ex.c
+++ b/board/gdsys/405ex/405ex.c
@@ -15,14 +15,14 @@
 
 int get_fpga_state(unsigned dev)
 {
-	return gd->fpga_state[dev];
+	return gd->arch.fpga_state[dev];
 }
 
 void print_fpga_state(unsigned dev)
 {
-	if (gd->fpga_state[dev] & FPGA_STATE_DONE_FAILED)
+	if (gd->arch.fpga_state[dev] & FPGA_STATE_DONE_FAILED)
 		puts("       Waiting for FPGA-DONE timed out.\n");
-	if (gd->fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
+	if (gd->arch.fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
 		puts("       FPGA reflection test failed.\n");
 }
 
@@ -192,7 +192,7 @@
 	unsigned ctr;
 
 	for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
-		gd->fpga_state[k] = 0;
+		gd->arch.fpga_state[k] = 0;
 
 	/*
 	 * reset FPGA
@@ -208,7 +208,8 @@
 		while (!gd405ex_get_fpga_done(k)) {
 			udelay(100000);
 			if (ctr++ > 5) {
-				gd->fpga_state[k] |= FPGA_STATE_DONE_FAILED;
+				gd->arch.fpga_state[k] |=
+					FPGA_STATE_DONE_FAILED;
 				break;
 			}
 		}
@@ -240,7 +241,7 @@
 
 			udelay(100000);
 			if (ctr++ > 5) {
-				gd->fpga_state[k] |=
+				gd->arch.fpga_state[k] |=
 					FPGA_STATE_REFLECTION_FAILED;
 				break;
 			}

board/gdsys/405ex/io64.c

diff --git a/board/gdsys/405ex/io64.c b/board/gdsys/405ex/io64.c
index 41fdef7..7d2899d 100644
--- a/board/gdsys/405ex/io64.c
+++ b/board/gdsys/405ex/io64.c
@@ -359,7 +359,7 @@
 
 	if (i2c_probe(0x22)) { /* i2c_probe returns 0 on success */
 		for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
-			gd->fpga_state[k] |= FPGA_STATE_PLATFORM;
+			gd->arch.fpga_state[k] |= FPGA_STATE_PLATFORM;
 	} else {
 		pca9698_direction_output(0x22, 39, 1);
 	}