net/designware - switch driver to phylib usage
With this change driver will benefit from existing phylib and thus
custom phy functionality implemented in the driver will go away:
* Instantiation of the driver is now much shorter - 2 parameters
instead of 4.
* Simplified phy management/functoinality in driver is replaced with
rich functionality of phylib.
* Support of custom phy initialization is now done with existing
"board_phy_config".
Note that after this change some previously used config options
(driver-specific PHY configuration) will be obsolete and they are simply
substituted with similar options of phylib.
For example:
* CONFIG_DW_AUTONEG - no need in this one. Autonegotiation is enabled
by default.
* CONFIG_DW_SEARCH_PHY - if one wants to specify attached phy
explicitly CONFIG_PHY_ADDR board config option has to be used, otherwise
automatically the first discovered on MDIO bus phy will be used
I believe there's no need now in "doc/README.designware_eth" because
user only needs to instantiate the driver with "designware_initialize"
whose prototype exists in "include/netdev.h".
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
diff --git a/board/spear/spear300/spear300.c b/board/spear/spear300/spear300.c
index e25aba2..6b6bd9f 100644
--- a/board/spear/spear300/spear300.c
+++ b/board/spear/spear300/spear300.c
@@ -53,8 +53,7 @@
#if defined(CONFIG_DESIGNWARE_ETH)
u32 interface = PHY_INTERFACE_MODE_MII;
- if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY,
- interface) >= 0)
+ if (designware_initialize(CONFIG_SPEAR_ETHBASE, interface) >= 0)
ret++;
#endif
return ret;
diff --git a/board/spear/spear310/spear310.c b/board/spear/spear310/spear310.c
index 70f9aa1..a4c6a8e 100644
--- a/board/spear/spear310/spear310.c
+++ b/board/spear/spear310/spear310.c
@@ -54,8 +54,7 @@
#if defined(CONFIG_DESIGNWARE_ETH)
u32 interface = PHY_INTERFACE_MODE_MII;
- if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY,
- interface) >= 0)
+ if (designware_initialize(CONFIG_SPEAR_ETHBASE, interface) >= 0)
ret++;
#endif
#if defined(CONFIG_MACB)
diff --git a/board/spear/spear320/spear320.c b/board/spear/spear320/spear320.c
index f6b1fdd..ab732a7 100644
--- a/board/spear/spear320/spear320.c
+++ b/board/spear/spear320/spear320.c
@@ -65,8 +65,7 @@
#if defined(CONFIG_DESIGNWARE_ETH)
u32 interface = PHY_INTERFACE_MODE_MII;
- if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY,
- interface) >= 0)
+ if (designware_initialize(CONFIG_SPEAR_ETHBASE, interface) >= 0)
ret++;
#endif
#if defined(CONFIG_MACB)
diff --git a/board/spear/spear600/spear600.c b/board/spear/spear600/spear600.c
index e996a0e..8472002 100644
--- a/board/spear/spear600/spear600.c
+++ b/board/spear/spear600/spear600.c
@@ -51,8 +51,7 @@
#if defined(CONFIG_DW_AUTONEG)
interface = PHY_INTERFACE_MODE_GMII;
#endif
- if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY,
- interface) >= 0)
+ if (designware_initialize(CONFIG_SPEAR_ETHBASE, interface) >= 0)
ret++;
#endif
return ret;
diff --git a/board/spear/x600/x600.c b/board/spear/x600/x600.c
index 044d204..b8edfcd 100644
--- a/board/spear/x600/x600.c
+++ b/board/spear/x600/x600.c
@@ -67,31 +67,32 @@
fsmc_nand_init(nand);
}
-int designware_board_phy_init(struct eth_device *dev, int phy_addr,
- int (*mii_write)(struct eth_device *, u8, u8, u16),
- int dw_reset_phy(struct eth_device *))
+int board_phy_config(struct phy_device *phydev)
{
/* Extended PHY control 1, select GMII */
- mii_write(dev, phy_addr, 23, 0x0020);
+ phy_write(phydev, MDIO_DEVAD_NONE, 23, 0x0020);
/* Software reset necessary after GMII mode selction */
- dw_reset_phy(dev);
+ phy_reset(phydev);
/* Enable extended page register access */
- mii_write(dev, phy_addr, 31, 0x0001);
+ phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0001);
/* 17e: Enhanced LED behavior, needs to be written twice */
- mii_write(dev, phy_addr, 17, 0x09ff);
- mii_write(dev, phy_addr, 17, 0x09ff);
+ phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff);
+ phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x09ff);
/* 16e: Enhanced LED method select */
- mii_write(dev, phy_addr, 16, 0xe0ea);
+ phy_write(phydev, MDIO_DEVAD_NONE, 16, 0xe0ea);
/* Disable extended page register access */
- mii_write(dev, phy_addr, 31, 0x0000);
+ phy_write(phydev, MDIO_DEVAD_NONE, 31, 0x0000);
/* Enable clock output pin */
- mii_write(dev, phy_addr, 18, 0x0049);
+ phy_write(phydev, MDIO_DEVAD_NONE, 18, 0x0049);
+
+ if (phydev->drv->config)
+ phydev->drv->config(phydev);
return 0;
}
@@ -100,7 +101,7 @@
{
int ret = 0;
- if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_PHY_ADDR,
+ if (designware_initialize(CONFIG_SPEAR_ETHBASE,
PHY_INTERFACE_MODE_GMII) >= 0)
ret++;