commit 92f7fed4f738149121c779fe1dda857585bdeccf
author Priyanka Jain <Priyanka.Jain@freescale.com> Fri Sep 05 15:18:31 2014 +0530
committer York Sun <yorksun@freescale.com> Wed Sep 24 13:11:32 2014 -0700
tree 78f43b9dfa3ad58ddb572e9b479992f0d87af88f
parent 07c4eea4846cde938c4b0d8c1ddee95d373693ed

powerpc/t104xrdb: Set DDR ODT to 75ohm

DDR-ODT require cfg_dram_type switch set properly as per DDR type.
T1040RDB, T1042RDB boards have DDR3L type DDR, so cfg_dram_type
should be set to OFF for DDR3L
Update t104xrdb/README for switch setting

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

board/freescale/t104xrdb/README

diff --git a/board/freescale/t104xrdb/README b/board/freescale/t104xrdb/README
index a0f5fa9..ac95b5e 100644
--- a/board/freescale/t104xrdb/README
+++ b/board/freescale/t104xrdb/README
@@ -272,15 +272,15 @@
 ===============
 NAND boot SW setting:
 SW1: 10001000
-SW2: 00111001
+SW2: 00111011
 SW3: 11110001
 
 SPI boot SW setting:
 SW1: 00100010
-SW2: 10111001
+SW2: 10111011
 SW3: 11100001
 
 SD boot SW setting:
 SW1: 00100000
-SW2: 00111001
+SW2: 00111011
 SW3: 11100001

board/freescale/t104xrdb/ddr.c

diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index 34c9224..2c331ee 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -105,8 +105,8 @@
 	popts->zq_en = 1;
 
 	/* DHC_EN =1, ODT = 75 Ohm */
-	popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_OFF);
-	popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_OFF);
+	popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
+	popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
 }
 
 phys_size_t initdram(int board_type)