ppc/85xx: Use CONFIG_NS16550_MIN_FUNCTIONS to reduce NAND_SPL size
The MPC8536DS_NAND SPL build was failing due to code size increase
introduced by commit:
commit 33f57bd553edf29dffef5a6c7d76e169c79a6049
Author: Kumar Gala <galak@kernel.crashing.org>
Date: Fri Mar 26 15:14:43 2010 -0500
85xx: Fix enabling of L1 cache parity on secondary cores
We built in some NS16550 functions that we dont need and can get
rid of them via CONFIG_NS16550_MIN_FUNCTIONS.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 405e6d5..a9b4004c 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -286,6 +286,9 @@
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
+#ifdef CONFIG_NAND_SPL
+#define CONFIG_NS16550_MIN_FUNCTIONS
+#endif
#define CONFIG_SERIAL_MULTI 1 /* Enable both serial ports */
#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */