arm: socfpga: Add support for Terasic SoCkit board
Add support for Terasic SoCkit, which is CycloneV based board.
The board can boot either from SD/MMC or QSPI. Ethernet is also
supported.
Signed-off-by: Marek Vasut <marex@denx.de>
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 3babe65..69c2c82 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -61,6 +61,7 @@
dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_arria5_socdk.dtb \
socfpga_cyclone5_socdk.dtb \
+ socfpga_cyclone5_sockit.dtb \
socfpga_cyclone5_socrates.dtb
dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb
dtb-$(CONFIG_TARGET_STV0991) += stv0991.dtb
diff --git a/arch/arm/dts/socfpga_cyclone5_sockit.dts b/arch/arm/dts/socfpga_cyclone5_sockit.dts
new file mode 100644
index 0000000..d7c41c8
--- /dev/null
+++ b/arch/arm/dts/socfpga_cyclone5_sockit.dts
@@ -0,0 +1,92 @@
+/*
+ * Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+ model = "Terasic SoCkit";
+ compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ aliases {
+ ethernet0 = &gmac1;
+ };
+
+ memory {
+ name = "memory";
+ device_type = "memory";
+ reg = <0x0 0x40000000>; /* 1GB */
+ };
+
+ soc {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&gmac1 {
+ status = "okay";
+ phy-mode = "rgmii";
+
+ rxd0-skew-ps = <0>;
+ rxd1-skew-ps = <0>;
+ rxd2-skew-ps = <0>;
+ rxd3-skew-ps = <0>;
+ txen-skew-ps = <0>;
+ txc-skew-ps = <2600>;
+ rxdv-skew-ps = <0>;
+ rxc-skew-ps = <2000>;
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&gpio2 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+
+ rtc: rtc@68 {
+ compatible = "stm,m41t82";
+ reg = <0x68>;
+ };
+};
+
+&mmc0 {
+ status = "okay";
+ u-boot,dm-pre-reloc;
+};
+
+&qspi {
+ status = "okay";
+ u-boot,dm-pre-reloc;
+
+ flash0: n25q00@0 {
+ u-boot,dm-pre-reloc;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "n25q00", "spi-flash";
+ reg = <0>; /* chip select */
+ spi-max-frequency = <50000000>;
+ m25p,fast-read;
+ page-size = <256>;
+ block-size = <16>; /* 2^16, 64KB */
+ read-delay = <4>; /* delay value in read data capture register */
+ tshsl-ns = <50>;
+ tsd2d-ns = <50>;
+ tchsh-ns = <4>;
+ tslch-ns = <4>;
+ };
+};
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 690e362..7520757 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -18,15 +18,21 @@
bool "Altera SOCFPGA SoCDK (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
+config TARGET_SOCFPGA_TERASIC_SOCKIT
+ bool "Terasic SoCkit (Cyclone V)"
+ select TARGET_SOCFPGA_CYCLONE5
+
endchoice
config SYS_BOARD
default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
+ default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
config SYS_VENDOR
default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
+ default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
config SYS_SOC
default "socfpga"
@@ -34,5 +40,6 @@
config SYS_CONFIG_NAME
default "socfpga_arria5" if TARGET_SOCFPGA_ARRIA5_SOCDK
default "socfpga_cyclone5" if TARGET_SOCFPGA_CYCLONE5_SOCDK
+ default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
endif