Convert CONFIG_L2_CACHE to Kconfig
This converts the following to Kconfig:
CONFIG_L2_CACHE
Signed-off-by: Tom Rini <trini@konsulko.com>
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 721dafc..3651961 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -1297,6 +1297,9 @@
Number of TLB CAM entries for Book-E chips. 64 for E500MC,
16 for other E500 SoCs.
+config L2_CACHE
+ bool "Enable L2 cache support"
+
if HETROGENOUS_CLUSTERS
config SYS_MAPLE
diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index 241cb80..05034ce 100644
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -13,6 +13,7 @@
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_MPC8548CDS=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_USE_UBOOTPATH=y
CONFIG_UBOOTPATH="8548cds/u-boot.bin"
diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index 5af056b..965c37e 100644
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -13,6 +13,7 @@
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_MPC8548CDS=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_USE_UBOOTPATH=y
CONFIG_UBOOTPATH="8548cds/u-boot.bin"
diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index 34d1938..004175c 100644
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -13,6 +13,7 @@
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_MPC8548CDS=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_TARGET_MPC8548CDS_LEGACY=y
CONFIG_USE_UBOOTPATH=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 3fb993e..c12948a 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -16,6 +16,7 @@
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index dc6dd71..6a32071 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -9,6 +9,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PA=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_USE_UBOOTPATH=y
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index bc29526..e3b786d 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -14,6 +14,7 @@
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index 5c42d5e..e6ce59e 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -16,6 +16,7 @@
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index b6e68d2..99b94a0 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -16,6 +16,7 @@
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
index fe24faa..0711233 100644
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -9,6 +9,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PA=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_USE_UBOOTPATH=y
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index 110a9b4..9f2afcd 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -14,6 +14,7 @@
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index fcd60f7..7c64fdc 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -16,6 +16,7 @@
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index 76919c3..87953b8 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -16,6 +16,7 @@
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index b297258..bf70780 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -9,6 +9,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PB=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_USE_UBOOTPATH=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index df80488..4dbf869 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -14,6 +14,7 @@
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index d27ea17..f5bcffb 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -16,6 +16,7 @@
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 88de4f9..82f29be 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -16,6 +16,7 @@
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index 2e86aec..985243c 100644
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -9,6 +9,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PB=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_USE_UBOOTPATH=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index d5bbd6d..3dfb509 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -14,6 +14,7 @@
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index 66efe73..f3d399f 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -16,6 +16,7 @@
CONFIG_MPC85xx=y
CONFIG_SYS_INIT_RAM_LOCK=y
CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index 0f082f6..de04556 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index 88e10af..2d201bf 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -14,6 +14,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 729e93e..a6b7a4a 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 2860c28..58f2475 100644
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -10,6 +10,7 @@
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_USE_UBOOTPATH=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 0958a0a..cf47bd4 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index 81bb26c..3a86a9e 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -14,6 +14,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 481009f..9fe2b1d 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index 49207eb..17bde92 100644
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -10,6 +10,7 @@
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PC=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_USE_UBOOTPATH=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 7e22b4e..2f768c0 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 62b25f0..6cb3be0 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -14,6 +14,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index f5864de..0eb2b3a 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index ca04007..b0ccaa1 100644
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -10,6 +10,7 @@
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P1020RDB_PD=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_USE_UBOOTPATH=y
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index 2420217..c53c4c6 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 22b0023..0ac7428 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -14,6 +14,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index 8c95203..9da9ef0 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index b87c965..bb5df66 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -10,6 +10,7 @@
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_USE_UBOOTPATH=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 1d33cf6..4758e0e 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index 8d44e5b..1584a8a 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -14,6 +14,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 9155768..6acb0bc 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index 4f3be9e..2afef4a 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -10,6 +10,7 @@
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_P2020RDB=y
CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MPC85XX_NO_RESETVEC=y
CONFIG_USE_UBOOTPATH=y
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index 4cc50d3..46be662 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -10,6 +10,7 @@
CONFIG_SYS_INIT_RAM_LOCK=y
# CONFIG_CMD_ERRATA is not set
CONFIG_TARGET_SOCRATES=y
+CONFIG_L2_CACHE=y
CONFIG_ENABLE_36BIT_PHYS=y
CONFIG_SYS_MONITOR_LEN=393216
CONFIG_FIT=y
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 1f1eacd..3d0c219 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -18,11 +18,6 @@
#endif
/*
- * These can be toggled for performance analysis, otherwise use default.
- */
-#define CONFIG_L2_CACHE /* toggle L2 cache */
-
-/*
* Only possible on E500 Version 2 or newer cores.
*/
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 02d49c3..c398ece 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -95,11 +95,6 @@
#endif
#endif
-/*
- * These can be toggled for performance analysis, otherwise use default.
- */
-#define CONFIG_L2_CACHE /* toggle L2 cache */
-
/* DDR Setup */
#define SPD_EEPROM_ADDRESS 0x52
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index ee25990..c05904a 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -109,11 +109,6 @@
#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
#endif
-/*
- * These can be toggled for performance analysis, otherwise use default.
- */
-#define CONFIG_L2_CACHE
-
#define CFG_SYS_CCSRBAR 0xffe00000
#define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 11d8402..0547ed0 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -34,11 +34,6 @@
* in the README.mpc85xxads.
*/
-/*
- * These can be toggled for performance analysis, otherwise use default.
- */
-#define CONFIG_L2_CACHE /* toggle L2 cache */
-
#define CFG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */
#undef CFG_SYS_DRAM_TEST /* memory test, takes time */