| commit | 960efc5edce88dda1350f2ca1f92d3f358762112 | [log] [tgz] |
|---|---|---|
| author | Swapnil Jakhade <sjakhade@cadence.com> | Fri Jan 28 13:41:47 2022 +0530 |
| committer | Tom Rini <trini@konsulko.com> | Tue Feb 08 11:00:03 2022 -0500 |
| tree | 0df4cdad2ffb236b75470a28acfcf39d54a5cd00 | |
| parent | f0cb8096d9226d30b95363244287b4524742144d [diff] |
phy: cadence: Sierra: Update single link PCIe register configuration Add single link PCIe register configurations for no SSC and internal SSC. Also, add missing PMA lane registers for external SSC. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>