commit | 97d7ed37d1e329acf2c65cdb1992f0ceaa92aa53 | [log] [tgz] |
---|---|---|
author | Caleb Connolly <caleb.connolly@linaro.org> | Tue Nov 07 12:41:04 2023 +0000 |
committer | Caleb Connolly <caleb.connolly@linaro.org> | Tue Nov 14 11:28:52 2023 +0000 |
tree | 61677fb434793c453af5dbf1aa50a5342e18e611 | |
parent | c94f9e96e444367e409572a6f2cfaae1c42a5bf1 [diff] |
clk/qcom: add mnd_width to clk_rcg_set_rate_mnd() This property is needed on some platforms to ensure that only the relevant bits are set in the M/N/D registers. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>