x86: Support SPL and TPL
At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.
Enable the options for both along with some suitable default options
needed to boot through these phases.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/arch/Kconfig b/arch/Kconfig
index 760023b..2914567 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -126,6 +126,8 @@
config X86
bool "x86 architecture"
+ select SUPPORT_SPL
+ select SUPPORT_TPL
select CREATE_ARCH_SYMLINK
select DM
select DM_PCI
@@ -164,6 +166,35 @@
imply USB_HOST_ETHER
imply PCH
+ # Thing to enable for when SPL/TPL are enabled: SPL
+ imply SPL_DM
+ imply SPL_OF_LIBFDT
+ imply SPL_DRIVERS_MISC_SUPPORT
+ imply SPL_GPIO_SUPPORT
+ imply SPL_LIBCOMMON_SUPPORT
+ imply SPL_LIBGENERIC_SUPPORT
+ imply SPL_SERIAL_SUPPORT
+ imply SPL_SPI_FLASH_SUPPORT
+ imply SPL_SPI_SUPPORT
+ imply SPL_OF_CONTROL
+ imply SPL_TIMER
+ imply SPL_REGMAP
+ imply SPL_SYSCON
+ # TPL
+ imply TPL_DM
+ imply TPL_OF_LIBFDT
+ imply TPL_DRIVERS_MISC_SUPPORT
+ imply TPL_GPIO_SUPPORT
+ imply TPL_LIBCOMMON_SUPPORT
+ imply TPL_LIBGENERIC_SUPPORT
+ imply TPL_SERIAL_SUPPORT
+ imply TPL_SPI_FLASH_SUPPORT
+ imply TPL_SPI_SUPPORT
+ imply TPL_OF_CONTROL
+ imply TPL_TIMER
+ imply TPL_REGMAP
+ imply TPL_SYSCON
+
config XTENSA
bool "Xtensa architecture"
select CREATE_ARCH_SYMLINK