commit 9d466f2fe11a88da9f31f260296be042ed378b9d
author Álvaro Fernández Rojas <noltari@gmail.com> Sat Feb 03 10:30:28 2018 +0100
committer Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Wed Mar 21 23:23:13 2018 +0100
tree 02a98eebb5c4f9c80f82dbf2e2f287dc06f44354
parent 8f240a3b45d6b6cf51c69c3ae7e1b0f1774671a7

MIPS: add BMIPS Netgear DGND3700v2 board

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

board/netgear/dgnd3700v2/Kconfig

diff --git a/board/netgear/dgnd3700v2/Kconfig b/board/netgear/dgnd3700v2/Kconfig
new file mode 100644
index 0000000..11af188
--- /dev/null
+++ b/board/netgear/dgnd3700v2/Kconfig
@@ -0,0 +1,12 @@
+if BOARD_NETGEAR_DGND3700V2
+
+config SYS_BOARD
+	default "dgnd3700v2"
+
+config SYS_VENDOR
+	default "netgear"
+
+config SYS_CONFIG_NAME
+	default "netgear_dgnd3700v2"
+
+endif

board/netgear/dgnd3700v2/MAINTAINERS

diff --git a/board/netgear/dgnd3700v2/MAINTAINERS b/board/netgear/dgnd3700v2/MAINTAINERS
new file mode 100644
index 0000000..998077b
--- /dev/null
+++ b/board/netgear/dgnd3700v2/MAINTAINERS
@@ -0,0 +1,6 @@
+NETGEAR DGND3700V2 BOARD
+M:	Álvaro Fernández Rojas <noltari@gmail.com>
+S:	Maintained
+F:	board/netgear/dgnd3700v2/
+F:	include/configs/netgear_dgnd3700v2.h
+F:	configs/netgear_dgnd3700v2_ram_defconfig

board/netgear/dgnd3700v2/Makefile

diff --git a/board/netgear/dgnd3700v2/Makefile b/board/netgear/dgnd3700v2/Makefile
new file mode 100644
index 0000000..89fd6c8
--- /dev/null
+++ b/board/netgear/dgnd3700v2/Makefile
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += dgnd3700v2.o

board/netgear/dgnd3700v2/dgnd3700v2.c

diff --git a/board/netgear/dgnd3700v2/dgnd3700v2.c b/board/netgear/dgnd3700v2/dgnd3700v2.c
new file mode 100644
index 0000000..3ae7f6a
--- /dev/null
+++ b/board/netgear/dgnd3700v2/dgnd3700v2.c
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+#define GPIO_BASE_6362			0x10000080
+
+#define GPIO_MODE_6362_REG		0x18
+#define GPIO_MODE_6362_SERIAL_LED_DATA	BIT(2)
+#define GPIO_MODE_6362_SERIAL_LED_CLK	BIT(3)
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+	void __iomem *gpio_regs = map_physmem(GPIO_BASE_6362, 0, MAP_NOCACHE);
+
+	/* Enable Serial LEDs */
+	setbits_be32(gpio_regs + GPIO_MODE_6362_REG,
+		     GPIO_MODE_6362_SERIAL_LED_DATA |
+		     GPIO_MODE_6362_SERIAL_LED_CLK);
+
+	return 0;
+}
+#endif