arc: emsdp: Add initialization of PSRAM
If the "Page Mode" is not enabled on the device,
read operations from PSRAM may result in incorrect data.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
diff --git a/board/synopsys/emsdp/emsdp.c b/board/synopsys/emsdp/emsdp.c
index c0770b5..7a3fd5b 100644
--- a/board/synopsys/emsdp/emsdp.c
+++ b/board/synopsys/emsdp/emsdp.c
@@ -48,6 +48,43 @@
return 0;
}
+int board_early_init_r(void)
+{
+#define EMSDP_PSRAM_BASE 0xf2001000
+#define PSRAM_FLASH_CONFIG_REG_0 (void *)(EMSDP_PSRAM_BASE + 0x10)
+#define PSRAM_FLASH_CONFIG_REG_1 (void *)(EMSDP_PSRAM_BASE + 0x14)
+#define CRE_ENABLE BIT(31)
+#define CRE_DRIVE_CMD BIT(6)
+
+#define PSRAM_RCR_DPD BIT(1)
+#define PSRAM_RCR_PAGE_MODE BIT(7)
+
+/*
+ * PSRAM_FLASH_CONFIG_REG_x[30:15] to the address lines[16:1] of flash,
+ * thus "<< 1".
+ */
+#define PSRAM_RCR_SETUP ((PSRAM_RCR_DPD | PSRAM_RCR_PAGE_MODE) << 1)
+
+ // Switch PSRAM controller to command mode
+ writel(CRE_ENABLE | CRE_DRIVE_CMD, PSRAM_FLASH_CONFIG_REG_0);
+ // Program Refresh Configuration Register (RCR) for BANK0
+ writew(0, (void *)(0x10000000 + PSRAM_RCR_SETUP));
+ // Switch PSRAM controller back to memory mode
+ writel(0, PSRAM_FLASH_CONFIG_REG_0);
+
+
+ // Switch PSRAM controller to command mode
+ writel(CRE_ENABLE | CRE_DRIVE_CMD, PSRAM_FLASH_CONFIG_REG_1);
+ // Program Refresh Configuration Register (RCR) for BANK1
+ writew(0, (void *)(0x10800000 + PSRAM_RCR_SETUP));
+ // Switch PSRAM controller back to memory mode
+ writel(0, PSRAM_FLASH_CONFIG_REG_1);
+
+ printf("PSRAM initialized.\n");
+
+ return 0;
+}
+
int board_mmc_init(bd_t *bis)
{
struct dwmci_host *host = NULL;