commit 9ed303dfa97b773c4f4743238ea32b68e340afa9
author Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Fri Dec 04 20:17:28 2020 +0530
committer Priyanka Jain <priyanka.jain@nxp.com> Thu Dec 10 13:56:39 2020 +0530
tree 91dde171dda2db076c4751f420a88eaee6388dd4
parent 3a187cff7ac95887917bcf25f3f575bb677a361e

armv8: lx2162aqds: Add support for LX2162AQDS platform

This patch add base support for LX2162AQDS board.
LX2162AQDS board supports LX2162A family SoCs.
This patch add basic support of platform.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: hui.song <hui.song_1@nxp.com>
Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Signed-off-by: Vikas Singh <vikas.singh@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>

board/freescale/common/qixis.h

diff --git a/board/freescale/common/qixis.h b/board/freescale/common/qixis.h
index 93638d2..0860bd2 100644
--- a/board/freescale/common/qixis.h
+++ b/board/freescale/common/qixis.h
@@ -141,4 +141,29 @@
 
 #define QIXIS_EVDD_BY_SDHC_VS	0x0c
 
+#if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS) || \
+defined(CONFIG_TARGET_LX2160ARDB)
+#define QIXIS_XMAP_MASK			0x07
+#define QIXIS_RST_CTL_RESET_EN		0x30
+#define QIXIS_LBMAP_DFLTBANK		0x00
+#define QIXIS_LBMAP_ALTBANK		0x20
+#define QIXIS_LBMAP_QSPI		0x00
+#define QIXIS_RCW_SRC_QSPI		0xff
+#define QIXIS_RST_CTL_RESET		0x31
+#define QIXIS_RCFG_CTL_RECONFIG_IDLE	0x20
+#define QIXIS_RCFG_CTL_RECONFIG_START	0x21
+#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	0x08
+#define QIXIS_LBMAP_MASK		0x0f
+#define QIXIS_LBMAP_SD
+#define QIXIS_LBMAP_EMMC
+#define QIXIS_RCW_SRC_SD		0x08
+#define QIXIS_RCW_SRC_EMMC         0x09
+#define NON_EXTENDED_DUTCFG
+#endif
+
+#if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS)
+#define QIXIS_SDID_MASK			0x07
+#define QIXIS_ESDHC_NO_ADAPTER		0x7
+#endif
+
 #endif