spi: kirkwood_spi: Add support for multiple chip-selects on MVEBU
Currently only chip-select 0 is supported by the kirkwood SPI driver.
The Armada XP / 38x SoCs also use this driver and support multiple chip
selects. This patch adds support for multiple CS on MVEBU.
The register definitions are restructured a bit with this patch. Grouping
them to the corresponding registers.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jteki@openedev.com>
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index 80cdbd0..6851ba9 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -283,6 +283,19 @@
return _spi_xfer(plat->spireg, bitlen, dout, din, flags);
}
+static int mvebu_spi_claim_bus(struct udevice *dev)
+{
+ struct udevice *bus = dev->parent;
+ struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
+
+ /* Configure the chip-select in the CTRL register */
+ clrsetbits_le32(&plat->spireg->ctrl,
+ KWSPI_CS_MASK << KWSPI_CS_SHIFT,
+ spi_chip_select(dev) << KWSPI_CS_SHIFT);
+
+ return 0;
+}
+
static int mvebu_spi_probe(struct udevice *bus)
{
struct mvebu_spi_platdata *plat = dev_get_platdata(bus);
@@ -305,6 +318,7 @@
}
static const struct dm_spi_ops mvebu_spi_ops = {
+ .claim_bus = mvebu_spi_claim_bus,
.xfer = mvebu_spi_xfer,
.set_speed = mvebu_spi_set_speed,
.set_mode = mvebu_spi_set_mode,