Kconfigs: Correct default of "0" on hex type entries
It is not a parse error to have a default value of "0" for a "hex" type
entry, instead of "0x0". However, "0" and "0x0" are not treated the
same even by the tools themselves. Correct this by changing the default
value from "0" to "0x0" for all hex type questions that had the
incorrect default. Fix one instance (in two configs) of a default of "0"
being used on a hex question to be "0x0". Remove the cases where a
defconfig had set a value of "0x0" to be used as the default had been
"0".
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 3e292bf..46ace7e 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -98,7 +98,6 @@
config SYS_FSL_QSPI_SKIP_CLKSEL
bool "Skip setting QSPI clock during SoC init"
- default 0
help
To improve startup times when booting from QSPI flash, the QSPI
frequency can be set very early in the boot process. If this option
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index a8b493e..d46934c 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -739,7 +739,7 @@
config SYS_FSL_BOOTROM_BASE
hex
depends on FSL_LSCH2
- default 0
+ default 0x0
config SYS_FSL_BOOTROM_SIZE
hex
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index d94b582..2136ab7 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -181,7 +181,7 @@
config SPL_IMX_ROMAPI_LOADADDR
hex "Default load address to load image through ROM API"
depends on IMX8_ROMAPI || SPL_BOOTROM_SUPPORT
- default 0
+ default 0x0
config IMX_DCD_ADDR
hex "DCD Blocks location on the image"
diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig
index 15f844f..59d11b3 100644
--- a/arch/arm/mach-imx/imx8/Kconfig
+++ b/arch/arm/mach-imx/imx8/Kconfig
@@ -34,11 +34,11 @@
config BOOTAUX_RESERVED_MEM_BASE
hex "i.MX auxiliary core dram memory base"
- default 0
+ default 0x0
config BOOTAUX_RESERVED_MEM_SIZE
hex "i.MX auxiliary core dram memory size"
- default 0
+ default 0x0
choice
prompt "i.MX8 board select"
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 49da93d..4569a9c 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -469,7 +469,7 @@
config ROCKCHIP_SPL_RESERVE_IRAM
hex "Size of IRAM reserved in SPL"
- default 0
+ default 0x0
help
SPL may need reserve memory for firmware loaded by SPL, whose load
address is in IRAM and may overlay with SPL text area if not
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index e20c3a3..9d5df2c 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -568,7 +568,7 @@
config DRAM_TPR3
hex "sunxi dram tpr3 value"
- default 0
+ default 0x0
---help---
Set the dram controller tpr3 parameter. This parameter configures
the delay on the command lane and also phase shifts, which are
@@ -579,7 +579,7 @@
config DRAM_DQS_GATING_DELAY
hex "sunxi dram dqs_gating_delay value"
- default 0
+ default 0x0
---help---
Set the dram controller dqs_gating_delay parmeter. Each byte
encodes the DQS gating delay for each byte lane. The delay
diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index bd2af8d..1731c96 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -94,7 +94,7 @@
config SYS_SYPCR
hex "SYPCR register" if !WDT_MPC8xxx
- default 0
+ default 0x0
help
System Protection Control (11-9)