mmc: meson-gx: add support for mmc-pwrseq-emmc
Add support for mmc-pwrseq-emmc in the meson-gx mmc driver to support
enabling the eMMC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
index 767dfff..031cc79 100644
--- a/drivers/mmc/meson_gx_mmc.c
+++ b/drivers/mmc/meson_gx_mmc.c
@@ -7,8 +7,10 @@
#include <dm.h>
#include <fdtdec.h>
#include <malloc.h>
+#include <pwrseq.h>
#include <mmc.h>
#include <asm/io.h>
+#include <asm/gpio.h>
#include <asm/arch/sd_emmc.h>
#include <linux/log2.h>
@@ -239,6 +241,10 @@
struct mmc *mmc = &pdata->mmc;
struct mmc_config *cfg = &pdata->cfg;
uint32_t val;
+#ifdef CONFIG_PWRSEQ
+ struct udevice *pwr_dev;
+ int ret;
+#endif
cfg->voltages = MMC_VDD_33_34 | MMC_VDD_32_33 |
MMC_VDD_31_32 | MMC_VDD_165_195;
@@ -254,6 +260,17 @@
mmc_set_clock(mmc, cfg->f_min, MMC_CLK_ENABLE);
+#ifdef CONFIG_PWRSEQ
+ /* Enable power if needed */
+ ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
+ &pwr_dev);
+ if (!ret) {
+ ret = pwrseq_set_power(pwr_dev, true);
+ if (ret)
+ return ret;
+ }
+#endif
+
/* reset all status bits */
meson_write(mmc, STATUS_MASK, MESON_SD_EMMC_STATUS);
@@ -292,3 +309,37 @@
.ofdata_to_platdata = meson_mmc_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct meson_mmc_platdata),
};
+
+#ifdef CONFIG_PWRSEQ
+static int meson_mmc_pwrseq_set_power(struct udevice *dev, bool enable)
+{
+ struct gpio_desc reset;
+ int ret;
+
+ ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT);
+ if (ret)
+ return ret;
+ dm_gpio_set_value(&reset, 1);
+ udelay(1);
+ dm_gpio_set_value(&reset, 0);
+ udelay(200);
+
+ return 0;
+}
+
+static const struct pwrseq_ops meson_mmc_pwrseq_ops = {
+ .set_power = meson_mmc_pwrseq_set_power,
+};
+
+static const struct udevice_id meson_mmc_pwrseq_ids[] = {
+ { .compatible = "mmc-pwrseq-emmc" },
+ { }
+};
+
+U_BOOT_DRIVER(meson_mmc_pwrseq_drv) = {
+ .name = "mmc_pwrseq_emmc",
+ .id = UCLASS_PWRSEQ,
+ .of_match = meson_mmc_pwrseq_ids,
+ .ops = &meson_mmc_pwrseq_ops,
+};
+#endif