board: traverse: add initial Ten64 support
The Ten64 is a networking-oriented MiniITX board
using the NXP LS1088A SoC.
This patch provides the bare minimum to support
Ten64 boards under U-Boot for distroboot.
Some related drivers have not yet been submitted
and this basic support lacks some of the
opinionated defaults provided by our firmware
distribution.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6b11c3a..eb0f5bc 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1776,6 +1776,21 @@
help
Support for Kontron SMARC-sAL28 board.
+config TARGET_TEN64
+ bool "Support ten64"
+ select ARCH_LS1088A
+ select ARCH_MISC_INIT
+ select ARM64
+ select ARMV8_MULTIENTRY
+ select ARCH_SUPPORT_TFABOOT
+ select BOARD_LATE_INIT
+ select SUPPORT_SPL
+ select FSL_DDR_INTERACTIVE if !SD_BOOT
+ select GPIO_EXTRA_HEADER
+ help
+ Support for Traverse Technologies Ten64 board, based
+ on NXP LS1088A.
+
config TARGET_COLIBRI_PXA270
bool "Support colibri_pxa270"
select CPU_PXA27X
@@ -2225,6 +2240,7 @@
source "board/st/stv0991/Kconfig"
source "board/tcl/sl50/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
+source "board/traverse/ten64/Kconfig"
source "board/variscite/dart_6ul/Kconfig"
source "board/vscom/baltos/Kconfig"
source "board/phytium/durian/Kconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5d45d19..0ed8de2 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -485,6 +485,8 @@
fsl-ls1028a-kontron-sl28-var3.dtb \
fsl-ls1028a-kontron-sl28-var4.dtb \
+dtb-$(CONFIG_TARGET_TEN64) += fsl-ls1088a-ten64.dtb
+
dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb
dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb
dtb-$(CONFIG_TARGET_STARQLTECHN) += starqltechn.dtb
diff --git a/arch/arm/dts/fsl-ls1088a-ten64.dts b/arch/arm/dts/fsl-ls1088a-ten64.dts
new file mode 100644
index 0000000..43b669c
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1088a-ten64.dts
@@ -0,0 +1,377 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for Travese Ten64 (LS1088) board
+ * Based on fsl-ls1088a-rdb.dts
+ * Copyright 2017-2020 NXP
+ * Copyright 2019-2021 Traverse Technologies
+ *
+ * Author: Mathew McBride <matt@traverse.com.au>
+ */
+
+/dts-v1/;
+
+#include "fsl-ls1088a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Traverse Ten64";
+ compatible = "traverse,ten64", "fsl,ls1088a";
+
+ aliases {
+ spi0 = &qspi;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ buttons {
+ compatible = "gpio-keys";
+
+ /* Fired by system controller when
+ * external power off (e.g ATX Power Button)
+ * asserted
+ */
+ powerdn {
+ label = "External Power Down";
+ gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
+ interrupts = <&gpio1 17 IRQ_TYPE_EDGE_FALLING>;
+ linux,code = <KEY_POWER>;
+ };
+
+ /* Rear Panel 'ADMIN' button (GPIO_H) */
+ admin {
+ label = "ADMIN button";
+ gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
+ interrupts = <&gpio3 8 IRQ_TYPE_EDGE_RISING>;
+ linux,code = <KEY_WPS_BUTTON>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ sfp1down {
+ label = "ten64:green:sfp1:down";
+ gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
+ };
+
+ sfp2up {
+ label = "ten64:green:sfp2:up";
+ gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
+ };
+
+ admin {
+ label = "ten64:admin";
+ gpios = <&sfpgpio 12 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ sfp_xg0: dpmac2-sfp {
+ compatible = "sff,sfp";
+ i2c-bus = <&sfplower_i2c>;
+ tx-fault-gpios = <&sfpgpio 0 GPIO_ACTIVE_HIGH>;
+ tx-disable-gpios = <&sfpgpio 1 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpios = <&sfpgpio 2 GPIO_ACTIVE_LOW>;
+ los-gpios = <&sfpgpio 3 GPIO_ACTIVE_HIGH>;
+ maximum-power-milliwatt = <2000>;
+ };
+
+ sfp_xg1: dpmac1-sfp {
+ compatible = "sff,sfp";
+ i2c-bus = <&sfpupper_i2c>;
+ tx-fault-gpios = <&sfpgpio 4 GPIO_ACTIVE_HIGH>;
+ tx-disable-gpios = <&sfpgpio 5 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpios = <&sfpgpio 6 GPIO_ACTIVE_LOW>;
+ los-gpios = <&sfpgpio 7 GPIO_ACTIVE_HIGH>;
+ maximum-power-milliwatt = <2000>;
+ };
+};
+
+/* XG1 - Upper SFP */
+&dpmac1 {
+ sfp = <&sfp_xg1>;
+ phy-connection-type = "10gbase-r";
+ managed = "in-band-status";
+ status = "okay";
+};
+
+/* XG0 - Lower SFP */
+&dpmac2 {
+ sfp = <&sfp_xg0>;
+ phy-connection-type = "10gbase-r";
+ managed = "in-band-status";
+ status = "okay";
+};
+
+/* DPMAC3..6 is GE4 to GE8 */
+&dpmac3 {
+ phy-handle = <&mdio1_phy5>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ status = "okay";
+};
+
+&dpmac4 {
+ phy-handle = <&mdio1_phy6>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ status = "okay";
+};
+
+&dpmac5 {
+ phy-handle = <&mdio1_phy7>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ status = "okay";
+};
+
+&dpmac6 {
+ phy-handle = <&mdio1_phy8>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ status = "okay";
+};
+
+/* DPMAC7..10 is GE0 to GE3 */
+&dpmac7 {
+ phy-handle = <&mdio1_phy1>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ status = "okay";
+};
+
+&dpmac8 {
+ phy-handle = <&mdio1_phy2>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ status = "okay";
+};
+
+&dpmac9 {
+ phy-handle = <&mdio1_phy3>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ status = "okay";
+};
+
+&dpmac10 {
+ phy-handle = <&mdio1_phy4>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ status = "okay";
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&serial1 {
+ status = "okay";
+};
+
+&emdio1 {
+ status = "okay";
+
+ mdio1_phy5: ethernet-phy@c {
+ reg = <0xc>;
+ };
+
+ mdio1_phy6: ethernet-phy@d {
+ reg = <0xd>;
+ };
+
+ mdio1_phy7: ethernet-phy@e {
+ reg = <0xe>;
+ };
+
+ mdio1_phy8: ethernet-phy@f {
+ reg = <0xf>;
+ };
+
+ mdio1_phy1: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+
+ mdio1_phy2: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+
+ mdio1_phy3: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+
+ mdio1_phy4: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+};
+
+&esdhc {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+
+ sfpgpio: gpio@76 {
+ compatible = "ti,tca9539";
+ reg = <0x76>;
+ #gpio-cells = <2>;
+ gpio-controller;
+
+ admin_led_lower {
+ gpio-hog;
+ gpios = <13 GPIO_ACTIVE_HIGH>;
+ output-low;
+ };
+ };
+
+ at97sc: tpm@29 {
+ compatible = "atmel,at97sc3204t";
+ reg = <0x29>;
+ };
+
+ uc: board-controller@7e {
+ compatible = "traverse,ten64-controller";
+ reg = <0x7e>;
+ };
+};
+
+&i2c2 {
+ status = "okay";
+
+ rx8035: rtc@32 {
+ compatible = "epson,rx8035";
+ reg = <0x32>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+
+ i2c-switch@70 {
+ compatible = "nxp,pca9540";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x70>;
+
+ sfpupper_i2c: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ sfplower_i2c: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ };
+};
+
+&qspi {
+ status = "okay";
+
+ en25s64: flash@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bl2";
+ reg = <0 0x100000>;
+ };
+
+ partition@100000 {
+ label = "bl3";
+ reg = <0x100000 0x200000>;
+ };
+
+ partition@300000 {
+ label = "mcfirmware";
+ reg = <0x300000 0x200000>;
+ };
+
+ partition@500000 {
+ label = "ubootenv";
+ reg = <0x500000 0x80000>;
+ };
+
+ partition@580000 {
+ label = "dpl";
+ reg = <0x580000 0x40000>;
+ };
+
+ partition@5C0000 {
+ label = "dpc";
+ reg = <0x5C0000 0x40000>;
+ };
+
+ partition@600000 {
+ label = "devicetree";
+ reg = <0x600000 0x40000>;
+ };
+ };
+ };
+
+ nand: flash@1 {
+ compatible = "spi-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <1>;
+ spi-max-frequency = <20000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* reserved for future boot direct from NAND flash
+ * (this would use the same layout as the 8MiB NOR flash)
+ */
+ partition@0 {
+ label = "nand-boot-reserved";
+ reg = <0 0x800000>;
+ };
+
+ /* recovery / install environment */
+ partition@800000 {
+ label = "recovery";
+ reg = <0x800000 0x2000000>;
+ };
+
+ /* ubia (first OpenWrt) - a/b names to prevent confusion with ubi0/1/etc. */
+ partition@2800000 {
+ label = "ubia";
+ reg = <0x2800000 0x6C00000>;
+ };
+
+ /* ubib (second OpenWrt) */
+ partition@9400000 {
+ label = "ubib";
+ reg = <0x9400000 0x6C00000>;
+ };
+ };
+ };
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+};