ColdFire: Add SBF support for M52277EVB
Add serial boot support
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
diff --git a/include/asm-m68k/m5227x.h b/include/asm-m68k/m5227x.h
index 61bc0ad..824d333 100644
--- a/include/asm-m68k/m5227x.h
+++ b/include/asm-m68k/m5227x.h
@@ -282,8 +282,8 @@
/* Bit definitions and macros for PAR_DSPI */
#define GPIO_PAR_DSPI_PCS0_MASK (0x3F)
-#define GPIO_PAR_DSPI_PCS0_PCS0 (0x80)
-#define GPIO_PAR_DSPI_PCS0_U2RTS (0x40)
+#define GPIO_PAR_DSPI_PCS0_PCS0 (0xC0)
+#define GPIO_PAR_DSPI_PCS0_U2RTS (0x80)
#define GPIO_PAR_DSPI_PCS0_GPIO (0x00)
#define GPIO_PAR_DSPI_SIN_MASK (0xCF)
#define GPIO_PAR_DSPI_SIN_SIN (0x30)
diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h
index b6226c6..5d5966f 100644
--- a/include/configs/M52277EVB.h
+++ b/include/configs/M52277EVB.h
@@ -40,7 +40,7 @@
#define CONFIG_MCFUART
#define CONFIG_SYS_UART_PORT (0)
-#define CONFIG_BAUDRATE 115200
+#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
#undef CONFIG_WATCHDOG
@@ -72,21 +72,50 @@
#define CONFIG_CMD_REGINFO
#undef CONFIG_CMD_USB
#undef CONFIG_CMD_BMP
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_SF
-#define CONFIG_HOSTNAME M52277EVB
+#define CONFIG_HOSTNAME M52277EVB
+#define CONFIG_SYS_UBOOT_END 0x3FFFF
+#define CONFIG_SYS_LOAD_ADDR2 0x40010007
+#ifdef CONFIG_SYS_STMICRO_BOOT
+/* ST Micro serial flash */
#define CONFIG_EXTRA_ENV_SETTINGS \
"inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \
- "loadaddr=" MK_STR(CONFIG_SYS_LOAD_ADDR) "\0" \
- "u-boot=u-boot.bin\0" \
- "load=tftp ${loadaddr) ${u-boot}\0" \
+ "loadaddr=0x40010000\0" \
+ "uboot=u-boot.bin\0" \
+ "load=loadb ${loadaddr} ${baudrate};" \
+ "loadb " MK_STR(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \
"upd=run load; run prog\0" \
- "prog=prot off 0 0x3ffff;" \
- "era 0 3ffff;" \
- "cp.b ${loadaddr} 0 ${filesize};" \
+ "prog=sf probe 0:2 10000 1;" \
+ "sf erase 0 30000;" \
+ "sf write ${loadaddr} 0 30000;" \
"save\0" \
""
+#endif
+#ifdef CONFIG_SYS_SPANSION_BOOT
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \
+ "loadaddr=0x40010000\0" \
+ "uboot=u-boot.bin\0" \
+ "load=loadb ${loadaddr} ${baudrate}\0" \
+ "upd=run load; run prog\0" \
+ "prog=prot off " MK_STR(CONFIG_SYS_FLASH_BASE) \
+ " " MK_STR(CONFIG_SYS_UBOOT_END) ";" \
+ "era " MK_STR(CONFIG_SYS_FLASH_BASE) " " \
+ MK_STR(CONFIG_SYS_UBOOT_END) ";" \
+ "cp.b ${loadaddr} " MK_STR(CONFIG_SYS_FLASH_BASE) \
+ " ${filesize}; save\0" \
+ "updsbf=run loadsbf; run progsbf\0" \
+ "loadsbf=loadb ${loadaddr} ${baudrate};" \
+ "loadb " MK_STR(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \
+ "progsbf=sf probe 0:2 10000 1;" \
+ "sf erase 0 30000;" \
+ "sf write ${loadaddr} 0 30000;" \
+ ""
+#endif
-#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
+#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
/* LCD */
#ifdef CONFIG_CMD_BMP
#define CONFIG_LCD
@@ -102,7 +131,7 @@
#define CONFIG_DOS_PARTITION
#define CONFIG_MAC_PARTITION
#define CONFIG_ISO_PARTITION
-#define CONFIG_SYS_USB_EHCI_REGS_BASE 0xFC0B0000
+#define CONFIG_SYS_USB_EHCI_REGS_BASE 0xFC0B0000
#define CONFIG_SYS_USB_EHCI_CPU_INIT
#endif
@@ -122,30 +151,53 @@
#define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x58000
-#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
+#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
+
+/* DSPI and Serial Flash */
+#define CONFIG_CF_DSPI
+#define CONFIG_HARD_SPI
+#define CONFIG_SYS_SER_FLASH_BASE 0x01000000
+#define CONFIG_SYS_SBFHDR_SIZE 0x7
+#ifdef CONFIG_CMD_SPI
+# define CONFIG_SYS_DSPI_CS2
+# define CONFIG_SPI_FLASH
+# define CONFIG_SPI_FLASH_STMICRO
+
+# define CONFIG_SYS_DSPI_DCTAR0 (DSPI_DCTAR_TRSZ(7) | \
+ DSPI_DCTAR_CPOL | \
+ DSPI_DCTAR_CPHA | \
+ DSPI_DCTAR_PCSSCK_1CLK | \
+ DSPI_DCTAR_PASC(0) | \
+ DSPI_DCTAR_PDT(0) | \
+ DSPI_DCTAR_CSSCK(0) | \
+ DSPI_DCTAR_ASC(0) | \
+ DSPI_DCTAR_PBR(0) | \
+ DSPI_DCTAR_DT(1) | \
+ DSPI_DCTAR_BR(1))
+#endif
/* Input, PCI, Flexbus, and VCO */
#define CONFIG_EXTRA_CLOCK
#define CONFIG_SYS_INPUT_CLKSRC 16000000
-#define CONFIG_PRAM 512 /* 512 KB */
+#define CONFIG_PRAM 2048 /* 2048 KB */
-#define CONFIG_SYS_PROMPT "-> "
+#define CONFIG_SYS_PROMPT "-> "
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
-#define CONFIG_SYS_HZ 1000
+#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_MBAR 0xFC000000
@@ -155,17 +207,18 @@
* You should know what you are doing if you make changes here.
*/
-/*-----------------------------------------------------------------------
+/*
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
-#define CONFIG_SYS_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */
-#define CONFIG_SYS_INIT_RAM_CTRL 0x21
+#define CONFIG_SYS_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */
+#define CONFIG_SYS_INIT_RAM_CTRL 0x221
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 16)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 32)
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32)
+#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - 32)
-/*-----------------------------------------------------------------------
+/*
* Start addresses for the final memory configuration
* (Set up by the startup code)
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
@@ -177,11 +230,16 @@
#define CONFIG_SYS_SDRAM_CTRL 0xE1092000
#define CONFIG_SYS_SDRAM_EMOD 0x81810000
#define CONFIG_SYS_SDRAM_MODE 0x00CD0000
+#define CONFIG_SYS_SDRAM_DRV_STRENGTH 0x00
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400
#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
+#ifdef CONFIG_CF_SBF
+# define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400)
+#else
+# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
+#endif
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
@@ -189,24 +247,40 @@
/* Initial Memory map for Linux */
#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
-/* Configuration for environment
+/*
+ * Configuration for environment
* Environment is embedded in u-boot in the second sector of the flash
*/
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_OVERWRITE 1
+#ifdef CONFIG_CF_SBF
+# define CONFIG_ENV_IS_IN_SPI_FLASH
+# define CONFIG_ENV_SPI_CS 2
+#else
+# define CONFIG_ENV_IS_IN_FLASH 1
+#endif
+#define CONFIG_ENV_OVERWRITE 1
#undef CONFIG_ENV_IS_EMBEDDED
/*-----------------------------------------------------------------------
* FLASH organization
*/
-#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
-#define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x8000)
-#define CONFIG_ENV_SECT_SIZE 0x8000
+#ifdef CONFIG_SYS_STMICRO_BOOT
+# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_SER_FLASH_BASE
+# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_SER_FLASH_BASE
+# define CONFIG_SYS_FLASH1_BASE CONFIG_SYS_CS0_BASE
+# define CONFIG_ENV_OFFSET 0x30000
+# define CONFIG_ENV_SIZE 0x1000
+# define CONFIG_ENV_SECT_SIZE 0x10000
+#endif
+#ifdef CONFIG_SYS_SPANSION_BOOT
+# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
+# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE
+# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x8000)
+# define CONFIG_ENV_SIZE 0x1000
+# define CONFIG_ENV_SECT_SIZE 0x8000
+#endif
#define CONFIG_SYS_FLASH_CFI
#ifdef CONFIG_SYS_FLASH_CFI
-
# define CONFIG_FLASH_CFI_DRIVER 1
# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */
# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
@@ -214,6 +288,7 @@
# define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
# define CONFIG_SYS_FLASH_CHECKSUM
+# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE }
#endif
/*
@@ -229,7 +304,7 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
+#define CONFIG_SYS_CACHELINE_SIZE 16
/*-----------------------------------------------------------------------
* Memory bank definitions
@@ -243,8 +318,14 @@
* CS5 - Available
*/
+#ifdef CONFIG_CF_SBF
+#define CONFIG_SYS_CS0_BASE 0x04000000
+#define CONFIG_SYS_CS0_MASK 0x00FF0001
+#define CONFIG_SYS_CS0_CTRL 0x00001FA0
+#else
#define CONFIG_SYS_CS0_BASE 0x00000000
#define CONFIG_SYS_CS0_MASK 0x00FF0001
#define CONFIG_SYS_CS0_CTRL 0x00001FA0
+#endif
#endif /* _M52277EVB_H */